{"id":"https://openalex.org/W1963496809","doi":"https://doi.org/10.1007/s00034-009-9132-5","title":"Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion","display_name":"Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion","publication_year":2009,"publication_date":"2009-08-19","ids":{"openalex":"https://openalex.org/W1963496809","doi":"https://doi.org/10.1007/s00034-009-9132-5","mag":"1963496809"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-009-9132-5","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-009-9132-5","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073266205","display_name":"Chia\u2010Chun Tsai","orcid":"https://orcid.org/0000-0002-6629-6946"},"institutions":[{"id":"https://openalex.org/I4210112569","display_name":"Nanhua University","ror":"https://ror.org/01tfbz441","country_code":"TW","type":"education","lineage":["https://openalex.org/I4210112569"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Chia-Chun Tsai","raw_affiliation_strings":["Department of Computer Science and Information Engineering, Nanhua University, Chiayi, Taiwan, ROC","Dept. of Computer Science and Information Engineering, Nanhua University, Chiayi, Taiwan, ROC"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Nanhua University, Chiayi, Taiwan, ROC","institution_ids":["https://openalex.org/I4210112569"]},{"raw_affiliation_string":"Dept. of Computer Science and Information Engineering, Nanhua University, Chiayi, Taiwan, ROC","institution_ids":["https://openalex.org/I4210112569"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103078911","display_name":"Jan-Ou Wu","orcid":"https://orcid.org/0000-0003-3134-8686"},"institutions":[{"id":"https://openalex.org/I38007976","display_name":"De Lin Institute of Technology","ror":"https://ror.org/00y3by878","country_code":"TW","type":"education","lineage":["https://openalex.org/I38007976"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jan-Ou Wu","raw_affiliation_strings":["Department of Electronic Engineering, De Lin Institute of Technology, Taipei, Taiwan, ROC","Department of Electronic Engineering, De Lin Institute of Technology, Taipei, Taiwan, ROC#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, De Lin Institute of Technology, Taipei, Taiwan, ROC","institution_ids":["https://openalex.org/I38007976"]},{"raw_affiliation_string":"Department of Electronic Engineering, De Lin Institute of Technology, Taipei, Taiwan, ROC#TAB#","institution_ids":["https://openalex.org/I38007976"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004644298","display_name":"Trong\u2010Yen Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Trong-Yen Lee","raw_affiliation_strings":["Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, Taiwan, ROC","Graduate Institute of Computer and Communication Eng., National Taipei University of Technology, Taipei, Taiwan, ROC#TAB#"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, Taiwan, ROC","institution_ids":["https://openalex.org/I118292597"]},{"raw_affiliation_string":"Graduate Institute of Computer and Communication Eng., National Taipei University of Technology, Taipei, Taiwan, ROC#TAB#","institution_ids":["https://openalex.org/I118292597"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5073266205"],"corresponding_institution_ids":["https://openalex.org/I4210112569"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05768586,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"28","issue":"6","first_page":"805","last_page":"817"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/rlc-circuit","display_name":"RLC circuit","score":0.8199748396873474},{"id":"https://openalex.org/keywords/repeater","display_name":"Repeater (horology)","score":0.7777700424194336},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.6758874654769897},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6096771359443665},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5683032870292664},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5020289421081543},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4970865547657013},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48499199748039246},{"id":"https://openalex.org/keywords/sink","display_name":"Sink (geography)","score":0.41022735834121704},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30792495608329773},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2523806691169739},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15690961480140686},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12021669745445251},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11904457211494446}],"concepts":[{"id":"https://openalex.org/C89880566","wikidata":"https://www.wikidata.org/wiki/Q323477","display_name":"RLC circuit","level":4,"score":0.8199748396873474},{"id":"https://openalex.org/C195545963","wikidata":"https://www.wikidata.org/wiki/Q1469803","display_name":"Repeater (horology)","level":3,"score":0.7777700424194336},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.6758874654769897},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6096771359443665},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5683032870292664},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5020289421081543},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4970865547657013},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48499199748039246},{"id":"https://openalex.org/C143050476","wikidata":"https://www.wikidata.org/wiki/Q194502","display_name":"Sink (geography)","level":2,"score":0.41022735834121704},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30792495608329773},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2523806691169739},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15690961480140686},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12021669745445251},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11904457211494446},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C58640448","wikidata":"https://www.wikidata.org/wiki/Q42515","display_name":"Cartography","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-009-9132-5","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-009-9132-5","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1984588379","https://openalex.org/W1990679103","https://openalex.org/W2042882340","https://openalex.org/W2097037835","https://openalex.org/W2106933609","https://openalex.org/W2110811521","https://openalex.org/W2112305348","https://openalex.org/W2125326833","https://openalex.org/W2130837518","https://openalex.org/W2132500962","https://openalex.org/W2141335062","https://openalex.org/W2143199124","https://openalex.org/W2162075508","https://openalex.org/W2171938271","https://openalex.org/W2180394037"],"related_works":["https://openalex.org/W298148513","https://openalex.org/W2361185434","https://openalex.org/W2409849714","https://openalex.org/W2545817622","https://openalex.org/W1597064262","https://openalex.org/W4251395473","https://openalex.org/W2317241001","https://openalex.org/W2099392315","https://openalex.org/W1989297956","https://openalex.org/W2166145590"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
