{"id":"https://openalex.org/W1566398388","doi":"https://doi.org/10.1007/bfb0057962","title":"Design of processor arrays for real-time applications","display_name":"Design of processor arrays for real-time applications","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W1566398388","doi":"https://doi.org/10.1007/bfb0057962","mag":"1566398388"},"language":"en","primary_location":{"id":"doi:10.1007/bfb0057962","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bfb0057962","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008284452","display_name":"Dirk Fimmel","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Dirk Fimmel","raw_affiliation_strings":["Department of Electrical Engineering, Dresden University of Technology, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Dresden University of Technology, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007941239","display_name":"Renate Merker","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Renate Merker","raw_affiliation_strings":["Department of Electrical Engineering, Dresden University of Technology, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Dresden University of Technology, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5008284452"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.1294,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.87516255,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1018","last_page":"1028"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8031614422798157},{"id":"https://openalex.org/keywords/processor-array","display_name":"Processor array","score":0.6034731864929199},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5997738242149353},{"id":"https://openalex.org/keywords/linearization","display_name":"Linearization","score":0.5987026691436768},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5898796916007996},{"id":"https://openalex.org/keywords/affine-transformation","display_name":"Affine transformation","score":0.5454698801040649},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5224517583847046},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5085541009902954},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.4997384548187256},{"id":"https://openalex.org/keywords/vector-processor","display_name":"Vector processor","score":0.47599709033966064},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4731489419937134},{"id":"https://openalex.org/keywords/linear-programming","display_name":"Linear programming","score":0.4644453823566437},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.4369966983795166},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.4191315174102783},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.35635435581207275},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.2891025245189667},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.13119220733642578},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12078779935836792}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8031614422798157},{"id":"https://openalex.org/C2776189500","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Processor array","level":2,"score":0.6034731864929199},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5997738242149353},{"id":"https://openalex.org/C11210021","wikidata":"https://www.wikidata.org/wiki/Q1520713","display_name":"Linearization","level":3,"score":0.5987026691436768},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5898796916007996},{"id":"https://openalex.org/C92757383","wikidata":"https://www.wikidata.org/wiki/Q382497","display_name":"Affine transformation","level":2,"score":0.5454698801040649},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5224517583847046},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5085541009902954},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.4997384548187256},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.47599709033966064},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4731489419937134},{"id":"https://openalex.org/C41045048","wikidata":"https://www.wikidata.org/wiki/Q202843","display_name":"Linear programming","level":2,"score":0.4644453823566437},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.4369966983795166},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.4191315174102783},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.35635435581207275},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.2891025245189667},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.13119220733642578},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12078779935836792},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/bfb0057962","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bfb0057962","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.22.9519","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.22.9519","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.iee.et.tu-dresden.de/~fimmel/papers/europar98.ps","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1930620610","https://openalex.org/W1963547452","https://openalex.org/W2002252837","https://openalex.org/W2064130185","https://openalex.org/W2074610187","https://openalex.org/W2079092669","https://openalex.org/W2097240873","https://openalex.org/W2139378242","https://openalex.org/W2141628696","https://openalex.org/W2156172744","https://openalex.org/W2166247781","https://openalex.org/W4214609516","https://openalex.org/W4301808069"],"related_works":["https://openalex.org/W2129360402","https://openalex.org/W1886305118","https://openalex.org/W260583283","https://openalex.org/W2092360205","https://openalex.org/W3005487101","https://openalex.org/W139076134","https://openalex.org/W2068067528","https://openalex.org/W2023237626","https://openalex.org/W1966476169","https://openalex.org/W2467219491"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}