{"id":"https://openalex.org/W2046130622","doi":"https://doi.org/10.1007/bf02120033","title":"Pipeline interleaving design for FIR, IIR, and FFT array processors","display_name":"Pipeline interleaving design for FIR, IIR, and FFT array processors","publication_year":1995,"publication_date":"1995-10-01","ids":{"openalex":"https://openalex.org/W2046130622","doi":"https://doi.org/10.1007/bf02120033","mag":"2046130622"},"language":"en","primary_location":{"id":"doi:10.1007/bf02120033","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf02120033","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071031607","display_name":"Liang\u2010Gee Chen","orcid":"https://orcid.org/0000-0001-9746-9355"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Liang-Gee Chen","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111543934","display_name":"Yeu-Shen Jehng","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yeu-Shen Jehng","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064876889","display_name":"Tzi\u2010Dar Chiueh","orcid":"https://orcid.org/0000-0003-0851-6629"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tzi-Dar Chiueh","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan 10764, R.O.C","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5071031607"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.15203719,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"3","first_page":"275","last_page":"293"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.8286547660827637},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.7702372074127197},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7394564151763916},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7363089323043823},{"id":"https://openalex.org/keywords/infinite-impulse-response","display_name":"Infinite impulse response","score":0.62541264295578},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5923216342926025},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.510006308555603},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.408560186624527},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.292868971824646},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2540276050567627},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.19994932413101196}],"concepts":[{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.8286547660827637},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.7702372074127197},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7394564151763916},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7363089323043823},{"id":"https://openalex.org/C183816354","wikidata":"https://www.wikidata.org/wiki/Q665617","display_name":"Infinite impulse response","level":4,"score":0.62541264295578},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5923216342926025},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.510006308555603},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.408560186624527},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.292868971824646},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2540276050567627},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.19994932413101196},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/bf02120033","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf02120033","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5899999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1522888794","https://openalex.org/W1542395456","https://openalex.org/W1991520774","https://openalex.org/W1995061764","https://openalex.org/W2011924194","https://openalex.org/W2056549821","https://openalex.org/W2149572032","https://openalex.org/W2506741459"],"related_works":["https://openalex.org/W4312785053","https://openalex.org/W2142009384","https://openalex.org/W3140661709","https://openalex.org/W76222141","https://openalex.org/W415847890","https://openalex.org/W2021631062","https://openalex.org/W2072565115","https://openalex.org/W3138047207","https://openalex.org/W2129450128","https://openalex.org/W3007580271"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}