{"id":"https://openalex.org/W1965357972","doi":"https://doi.org/10.1007/bf01941138","title":"From high-level descriptions to vlsi circuits","display_name":"From high-level descriptions to vlsi circuits","publication_year":1988,"publication_date":"1988-09-01","ids":{"openalex":"https://openalex.org/W1965357972","doi":"https://doi.org/10.1007/bf01941138","mag":"1965357972"},"language":"en","primary_location":{"id":"doi:10.1007/bf01941138","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf01941138","pdf_url":null,"source":{"id":"https://openalex.org/S125499977","display_name":"BIT Numerical Mathematics","issn_l":"0006-3835","issn":["0006-3835","1572-9125"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"BIT","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111895809","display_name":"J. Staunstrup","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]},{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK","US"],"is_corresponding":false,"raw_author_name":"J. Staunstrup","raw_affiliation_strings":["Computer Science Department, Aarhus University, Ny Munkegade, DK-8000, Aarhus C, Denmark","Computer Science Department, Princeton University, NJ 08540, Princeton, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Aarhus University, Ny Munkegade, DK-8000, Aarhus C, Denmark","institution_ids":["https://openalex.org/I204337017"]},{"raw_affiliation_string":"Computer Science Department, Princeton University, NJ 08540, Princeton, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087823003","display_name":"Mark R. Greenstreet","orcid":"https://orcid.org/0000-0002-1864-9495"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]},{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK","US"],"is_corresponding":false,"raw_author_name":"M. R. Greenstreet","raw_affiliation_strings":["Computer Science Department, Aarhus University, Ny Munkegade, DK-8000, Aarhus C, Denmark","Computer Science Department, Princeton University, NJ 08540, Princeton, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Aarhus University, Ny Munkegade, DK-8000, Aarhus C, Denmark","institution_ids":["https://openalex.org/I204337017"]},{"raw_affiliation_string":"Computer Science Department, Princeton University, NJ 08540, Princeton, USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2990,"currency":"USD","value_usd":2990},"apc_paid":null,"fwci":1.2577,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.79946667,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"28","issue":"3","first_page":"620","last_page":"638"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8489137291908264},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8025993704795837},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.758621871471405},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.6361151933670044},{"id":"https://openalex.org/keywords/notation","display_name":"Notation","score":0.607003390789032},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5551331043243408},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.46150070428848267},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4601154923439026},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42385178804397583},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.41385766863822937},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4088789224624634},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3441512882709503},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.30836981534957886},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20340171456336975},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1474471092224121},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11948788166046143},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.11521974205970764},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08580893278121948},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08241507411003113}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8489137291908264},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8025993704795837},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.758621871471405},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.6361151933670044},{"id":"https://openalex.org/C45357846","wikidata":"https://www.wikidata.org/wiki/Q2001982","display_name":"Notation","level":2,"score":0.607003390789032},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5551331043243408},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.46150070428848267},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4601154923439026},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42385178804397583},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.41385766863822937},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4088789224624634},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3441512882709503},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.30836981534957886},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20340171456336975},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1474471092224121},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11948788166046143},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.11521974205970764},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08580893278121948},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08241507411003113},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/bf01941138","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf01941138","pdf_url":null,"source":{"id":"https://openalex.org/S125499977","display_name":"BIT Numerical Mathematics","issn_l":"0006-3835","issn":["0006-3835","1572-9125"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"BIT","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2035497537","https://openalex.org/W2047434043","https://openalex.org/W2107410023","https://openalex.org/W2110425399","https://openalex.org/W2156762091","https://openalex.org/W2157118812","https://openalex.org/W2158819098","https://openalex.org/W2211669137","https://openalex.org/W3144368627","https://openalex.org/W4211008702"],"related_works":["https://openalex.org/W4312516786","https://openalex.org/W1502478103","https://openalex.org/W2109350679","https://openalex.org/W2093992207","https://openalex.org/W4300849150","https://openalex.org/W2146990170","https://openalex.org/W2085028021","https://openalex.org/W364924225","https://openalex.org/W304800142","https://openalex.org/W3094139610"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}
