{"id":"https://openalex.org/W1986195317","doi":"https://doi.org/10.1007/bf01384134","title":"A unified framework for describing and verifying hardware synchronous sequential systems","display_name":"A unified framework for describing and verifying hardware synchronous sequential systems","publication_year":1993,"publication_date":"1993-06-01","ids":{"openalex":"https://openalex.org/W1986195317","doi":"https://doi.org/10.1007/bf01384134","mag":"1986195317"},"language":"en","primary_location":{"id":"doi:10.1007/bf01384134","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf01384134","pdf_url":null,"source":{"id":"https://openalex.org/S3845260","display_name":"Formal Methods in System Design","issn_l":"0925-9856","issn":["0925-9856","1572-8102"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Formal Methods in System Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050107843","display_name":"Ghislaine Thuau","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ghislaine Thuau","raw_affiliation_strings":["VERIMAG, B.P. 53X, 38041, Grenoble Cedex, France","VERIMAG, Grenoble Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VERIMAG, B.P. 53X, 38041, Grenoble Cedex, France","institution_ids":["https://openalex.org/I4210156361"]},{"raw_affiliation_string":"VERIMAG, Grenoble Cedex, France","institution_ids":["https://openalex.org/I4210156361"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077844526","display_name":"B. Berkane","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Bachir Berkane","raw_affiliation_strings":["VERIMAG, B.P. 53X, 38041, Grenoble Cedex, France","VERIMAG, Grenoble Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VERIMAG, B.P. 53X, 38041, Grenoble Cedex, France","institution_ids":["https://openalex.org/I4210156361"]},{"raw_affiliation_string":"VERIMAG, Grenoble Cedex, France","institution_ids":["https://openalex.org/I4210156361"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210156361"],"apc_list":{"value":3490,"currency":"USD","value_usd":3490},"apc_paid":null,"fwci":1.3609,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.835693,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":"3","first_page":"259","last_page":"276"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lustre","display_name":"Lustre (file system)","score":0.9575374126434326},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7903203964233398},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6314111948013306},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5429830551147461},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.44686830043792725},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.41007161140441895},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3763737678527832},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3039153814315796},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.1613970398902893}],"concepts":[{"id":"https://openalex.org/C180699724","wikidata":"https://www.wikidata.org/wiki/Q1877782","display_name":"Lustre (file system)","level":3,"score":0.9575374126434326},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7903203964233398},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6314111948013306},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5429830551147461},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.44686830043792725},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.41007161140441895},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3763737678527832},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3039153814315796},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.1613970398902893},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/bf01384134","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf01384134","pdf_url":null,"source":{"id":"https://openalex.org/S3845260","display_name":"Formal Methods in System Design","issn_l":"0925-9856","issn":["0925-9856","1572-8102"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Formal Methods in System Design","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W170395114","https://openalex.org/W373952786","https://openalex.org/W650624718","https://openalex.org/W1517238881","https://openalex.org/W1967686058","https://openalex.org/W1982528015","https://openalex.org/W2016079448","https://openalex.org/W2061438988","https://openalex.org/W2081272455","https://openalex.org/W2097481095","https://openalex.org/W2101481392","https://openalex.org/W2125415493","https://openalex.org/W2141585059","https://openalex.org/W4243540980","https://openalex.org/W4252150202","https://openalex.org/W6654426816"],"related_works":["https://openalex.org/W1631753024","https://openalex.org/W2138022277","https://openalex.org/W2120424507","https://openalex.org/W2592133661","https://openalex.org/W2533212402","https://openalex.org/W2078880479","https://openalex.org/W2121865749","https://openalex.org/W4245257593","https://openalex.org/W1605920217","https://openalex.org/W2142450926"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}