{"id":"https://openalex.org/W2151419451","doi":"https://doi.org/10.1007/bf00971962","title":"Incorporating testability considerations in high-level synthesis","display_name":"Incorporating testability considerations in high-level synthesis","publication_year":1994,"publication_date":"1994-02-01","ids":{"openalex":"https://openalex.org/W2151419451","doi":"https://doi.org/10.1007/bf00971962","mag":"2151419451"},"language":"en","primary_location":{"id":"doi:10.1007/bf00971962","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf00971962","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032978288","display_name":"A. Mujumdar","orcid":null},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ashutosh Mujumdar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031169949","display_name":"Rajiv Jain","orcid":"https://orcid.org/0000-0002-5322-9074"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajiv Jain","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110218098","display_name":"Kewal K. Saluja","orcid":null},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kewal Saluja","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, 53706, Madison, WI","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5032978288"],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":6.9431,"has_fulltext":false,"cited_by_count":75,"citation_normalized_percentile":{"value":0.96719519,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"5","issue":"1","first_page":"43","last_page":"55"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.8888198137283325},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.622048020362854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5966801047325134},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5596071481704712},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5402863025665283},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5070369243621826},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4583550989627838},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4475904703140259},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4378580152988434},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3502468764781952},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32909053564071655},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21813622117042542},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21140235662460327},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20527085661888123},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.10264170169830322},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09192433953285217}],"concepts":[{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.8888198137283325},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.622048020362854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5966801047325134},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5596071481704712},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5402863025665283},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5070369243621826},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4583550989627838},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4475904703140259},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4378580152988434},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3502468764781952},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32909053564071655},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21813622117042542},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21140235662460327},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20527085661888123},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.10264170169830322},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09192433953285217},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/bf00971962","is_oa":false,"landing_page_url":"https://doi.org/10.1007/bf00971962","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W81000816","https://openalex.org/W2063747323","https://openalex.org/W2093842169","https://openalex.org/W2097099414","https://openalex.org/W2099676922","https://openalex.org/W2103538449","https://openalex.org/W2109352587","https://openalex.org/W2111667834","https://openalex.org/W2117922323","https://openalex.org/W2134354173","https://openalex.org/W2135129887","https://openalex.org/W2135174980","https://openalex.org/W2142832681","https://openalex.org/W2148757937","https://openalex.org/W2149020879","https://openalex.org/W2149241960","https://openalex.org/W2158966264","https://openalex.org/W2160162958","https://openalex.org/W2161455936","https://openalex.org/W2172154421","https://openalex.org/W4238717491"],"related_works":["https://openalex.org/W2157191248","https://openalex.org/W2107525390","https://openalex.org/W2150046587","https://openalex.org/W2164493372","https://openalex.org/W2153086993","https://openalex.org/W2114980936","https://openalex.org/W2102550588","https://openalex.org/W4233770127","https://openalex.org/W2126762048","https://openalex.org/W2373135325"],"abstract_inverted_index":null,"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-01-15T23:16:33.117629","created_date":"2025-10-10T00:00:00"}
