{"id":"https://openalex.org/W7204059193","doi":"https://doi.org/10.1007/978-981-92-4805-6_41","title":"MV-BSD: Multi-variable Speculation Diagrams for Compact Automated Logic Design","display_name":"MV-BSD: Multi-variable Speculation Diagrams for Compact Automated Logic Design","publication_year":2026,"publication_date":"2026-08-23","ids":{"openalex":"https://openalex.org/W7204059193","doi":"https://doi.org/10.1007/978-981-92-4805-6_41"},"language":"en","primary_location":{"id":"doi:10.1007/978-981-92-4805-6_41","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-92-4805-6_41","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101216348","display_name":"Xiangtao Guan","orcid":null},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiangtao Guan","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China","University of Science and Technology of China, Hefei, 230027, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"raw_affiliation_string":"University of Science and Technology of China, Hefei, 230027, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102318361","display_name":"Shuyao Cheng","orcid":"https://orcid.org/0000-0002-6291-0531"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuyao Cheng","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5147899985","display_name":"Rui Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rui Zhang","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056949827","display_name":"Zidong Du","orcid":"https://orcid.org/0000-0002-7603-4210"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zidong Du","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China","institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5056949827"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"592","last_page":"598"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":null,"topics":[],"keywords":[{"id":"https://openalex.org/keywords/binary-decision-diagram","display_name":"Binary decision diagram","score":0.6414999961853027},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5422999858856201},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.507099986076355},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.4869999885559082},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47350001335144043},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.46799999475479126},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4472000002861023},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4348999857902527},{"id":"https://openalex.org/keywords/speculation","display_name":"Speculation","score":0.4244000017642975},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.39899998903274536}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8227999806404114},{"id":"https://openalex.org/C3309909","wikidata":"https://www.wikidata.org/wiki/Q864155","display_name":"Binary decision diagram","level":2,"score":0.6414999961853027},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5422999858856201},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.507099986076355},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.4869999885559082},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47350001335144043},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.46799999475479126},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.46560001373291016},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4472000002861023},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4348999857902527},{"id":"https://openalex.org/C47941915","wikidata":"https://www.wikidata.org/wiki/Q107885","display_name":"Speculation","level":2,"score":0.4244000017642975},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.41999998688697815},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.39899998903274536},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.36660000681877136},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.3619000017642975},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.352400004863739},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.34450000524520874},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.3393999934196472},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.33559998869895935},{"id":"https://openalex.org/C20837028","wikidata":"https://www.wikidata.org/wiki/Q623966","display_name":"Influence diagram","level":3,"score":0.32420000433921814},{"id":"https://openalex.org/C141796577","wikidata":"https://www.wikidata.org/wiki/Q837479","display_name":"Boolean circuit","level":3,"score":0.3172999918460846},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.3102000057697296},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.30300000309944153},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.2987000048160553},{"id":"https://openalex.org/C186399060","wikidata":"https://www.wikidata.org/wiki/Q959962","display_name":"Diagram","level":2,"score":0.2840000092983246},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2809999883174896},{"id":"https://openalex.org/C94992772","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Circuit minimization for Boolean functions","level":4,"score":0.28060001134872437},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2761000096797943},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.26910001039505005},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.2671999931335449},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.265500009059906},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.25780001282691956},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.25769999623298645},{"id":"https://openalex.org/C10418432","wikidata":"https://www.wikidata.org/wiki/Q560370","display_name":"AND gate","level":3,"score":0.25600001215934753}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-981-92-4805-6_41","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-92-4805-6_41","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2080267935","https://openalex.org/W2108016168","https://openalex.org/W3092631336","https://openalex.org/W3093608050","https://openalex.org/W4250447890","https://openalex.org/W4327851439","https://openalex.org/W4389166691","https://openalex.org/W4404133849","https://openalex.org/W4414360337","https://openalex.org/W4415792834"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-08-24T07:32:12.397491","created_date":"2026-08-24T00:00:00"}