{"id":"https://openalex.org/W2967680713","doi":"https://doi.org/10.1007/978-981-32-9767-8_52","title":"A Robust Low-Power Write-Assist Data-Dependent-Power-Supplied 12T SRAM Cell","display_name":"A Robust Low-Power Write-Assist Data-Dependent-Power-Supplied 12T SRAM Cell","publication_year":2019,"publication_date":"2019-01-01","ids":{"openalex":"https://openalex.org/W2967680713","doi":"https://doi.org/10.1007/978-981-32-9767-8_52","mag":"2967680713"},"language":"en","primary_location":{"id":"doi:10.1007/978-981-32-9767-8_52","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-32-9767-8_52","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101863165","display_name":"Neha Gupta","orcid":"https://orcid.org/0000-0003-2239-535X"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Neha Gupta","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050036010","display_name":"J. Sivavara Prasad","orcid":"https://orcid.org/0000-0003-3051-7054"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Jitesh Prasad","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082529632","display_name":"Rana Sagar Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rana Sagar Kumar","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040615282","display_name":"Gunjan Rajput","orcid":"https://orcid.org/0000-0002-4716-3558"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gunjan Rajput","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068792760","display_name":"Santosh Kumar Vishvakarma","orcid":"https://orcid.org/0000-0003-4223-0077"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santosh Kumar Vishvakarma","raw_affiliation_strings":["Electrical Engineering, Indian Institute of Technology Indore, Indore, India","Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]},{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology Indore, Indore, 453552, M.P., India","institution_ids":["https://openalex.org/I64295750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101863165"],"corresponding_institution_ids":["https://openalex.org/I64295750"],"apc_list":null,"apc_paid":null,"fwci":1.4886,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.80725358,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"630","last_page":"642"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5850492715835571},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5753037333488464},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5695120096206665},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.522070586681366},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4656311869621277},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46451395750045776},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4378904104232788},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.4246547818183899},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4153462052345276},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36789369583129883},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.36481714248657227},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31637319922447205},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1683354675769806},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.15248164534568787},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.12579086422920227},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09988775849342346},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07486644387245178}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5850492715835571},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5753037333488464},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5695120096206665},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.522070586681366},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4656311869621277},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46451395750045776},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4378904104232788},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.4246547818183899},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4153462052345276},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36789369583129883},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36481714248657227},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31637319922447205},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1683354675769806},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.15248164534568787},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.12579086422920227},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09988775849342346},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07486644387245178},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-981-32-9767-8_52","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-32-9767-8_52","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5400000214576721,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W274004780","https://openalex.org/W1753784006","https://openalex.org/W1974159394","https://openalex.org/W2002612140","https://openalex.org/W2004965314","https://openalex.org/W2035589388","https://openalex.org/W2069909337","https://openalex.org/W2122497527","https://openalex.org/W2131833150","https://openalex.org/W2134884071","https://openalex.org/W2157743350","https://openalex.org/W2344542627","https://openalex.org/W2496254462","https://openalex.org/W2547958591","https://openalex.org/W2729749234","https://openalex.org/W2793929663","https://openalex.org/W2804691385","https://openalex.org/W2886085896","https://openalex.org/W2889235776","https://openalex.org/W6637817741"],"related_works":["https://openalex.org/W2118528827","https://openalex.org/W2164440002","https://openalex.org/W1582224818","https://openalex.org/W2775062502","https://openalex.org/W3032966989","https://openalex.org/W2044270051","https://openalex.org/W4285609043","https://openalex.org/W2894151971","https://openalex.org/W2549050530","https://openalex.org/W3082116521"],"abstract_inverted_index":null,"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}