{"id":"https://openalex.org/W2968923133","doi":"https://doi.org/10.1007/978-981-32-9767-8_29","title":"An Ultra Low Power AES Architecture for IoT","display_name":"An Ultra Low Power AES Architecture for IoT","publication_year":2019,"publication_date":"2019-01-01","ids":{"openalex":"https://openalex.org/W2968923133","doi":"https://doi.org/10.1007/978-981-32-9767-8_29","mag":"2968923133"},"language":"en","primary_location":{"id":"doi:10.1007/978-981-32-9767-8_29","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-32-9767-8_29","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034456662","display_name":"Sajid Khan","orcid":"https://orcid.org/0000-0002-3724-9251"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sajid Khan","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101863165","display_name":"Neha Gupta","orcid":"https://orcid.org/0000-0003-2239-535X"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Neha Gupta","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028707436","display_name":"Gopal Raut","orcid":"https://orcid.org/0000-0002-1046-9457"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gopal Raut","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040615282","display_name":"Gunjan Rajput","orcid":"https://orcid.org/0000-0002-4716-3558"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gunjan Rajput","raw_affiliation_strings":["Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011088447","display_name":"Jai Gopal Pandey","orcid":"https://orcid.org/0000-0001-9937-7438"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Jai Gopal Pandey","raw_affiliation_strings":["Integrated System Group, CSIR-CEERI, Pilani, 333031, Rajasthan, India"],"affiliations":[{"raw_affiliation_string":"Integrated System Group, CSIR-CEERI, Pilani, 333031, Rajasthan, India","institution_ids":["https://openalex.org/I41763900"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068792760","display_name":"Santosh Kumar Vishvakarma","orcid":"https://orcid.org/0000-0003-4223-0077"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santosh Kumar Vishvakarma","raw_affiliation_strings":["Electrical Engineering, Indian Institute of Technology Indore, Indore, India","Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]},{"raw_affiliation_string":"Nanoscale Devices, VLSI Circuit and System Design Lab, Discipline of Electrical Engineering, Indian Institute of Technology, Indore, 453552, Madhya Pradesh, India","institution_ids":["https://openalex.org/I64295750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5034456662"],"corresponding_institution_ids":["https://openalex.org/I64295750"],"apc_list":null,"apc_paid":null,"fwci":0.2756,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56255814,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"334","last_page":"344"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7526350617408752},{"id":"https://openalex.org/keywords/cipher","display_name":"Cipher","score":0.7145107388496399},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.659999668598175},{"id":"https://openalex.org/keywords/plaintext","display_name":"Plaintext","score":0.64306640625},{"id":"https://openalex.org/keywords/block-cipher","display_name":"Block cipher","score":0.5914676785469055},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5045369863510132},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.49840259552001953},{"id":"https://openalex.org/keywords/ciphertext","display_name":"Ciphertext","score":0.4575961232185364},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.4527095854282379},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.42523038387298584},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.4226081967353821},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4219434857368469},{"id":"https://openalex.org/keywords/running-key-cipher","display_name":"Running key cipher","score":0.41248300671577454},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.31329089403152466},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.22018030285835266}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7526350617408752},{"id":"https://openalex.org/C2780221543","wikidata":"https://www.wikidata.org/wiki/Q4681865","display_name":"Cipher","level":3,"score":0.7145107388496399},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.659999668598175},{"id":"https://openalex.org/C92717368","wikidata":"https://www.wikidata.org/wiki/Q1162538","display_name":"Plaintext","level":3,"score":0.64306640625},{"id":"https://openalex.org/C106544461","wikidata":"https://www.wikidata.org/wiki/Q543151","display_name":"Block cipher","level":3,"score":0.5914676785469055},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5045369863510132},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.49840259552001953},{"id":"https://openalex.org/C93974786","wikidata":"https://www.wikidata.org/wiki/Q1589480","display_name":"Ciphertext","level":3,"score":0.4575961232185364},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.4527095854282379},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.42523038387298584},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.4226081967353821},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4219434857368469},{"id":"https://openalex.org/C64119674","wikidata":"https://www.wikidata.org/wiki/Q7380031","display_name":"Running key cipher","level":4,"score":0.41248300671577454},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.31329089403152466},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.22018030285835266}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-981-32-9767-8_29","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-32-9767-8_29","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1571368811","https://openalex.org/W1649262043","https://openalex.org/W2038244154","https://openalex.org/W2058401212","https://openalex.org/W2065955975","https://openalex.org/W2104927807","https://openalex.org/W2106550259","https://openalex.org/W2132729131","https://openalex.org/W2170134580","https://openalex.org/W2406134143","https://openalex.org/W2526102565","https://openalex.org/W2727299004","https://openalex.org/W4241054193"],"related_works":["https://openalex.org/W2997530193","https://openalex.org/W4310649982","https://openalex.org/W2545542083","https://openalex.org/W2369513516","https://openalex.org/W2942137924","https://openalex.org/W4236344152","https://openalex.org/W3004557383","https://openalex.org/W2026278835","https://openalex.org/W4239795009","https://openalex.org/W3154315844"],"abstract_inverted_index":null,"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}