{"id":"https://openalex.org/W2777268178","doi":"https://doi.org/10.1007/978-981-10-7470-7_70","title":"Design and Implementation of Mixed Parallel and Dataflow Architecture for Intra-prediction Hardware in HEVC Decoder","display_name":"Design and Implementation of Mixed Parallel and Dataflow Architecture for Intra-prediction Hardware in HEVC Decoder","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2777268178","doi":"https://doi.org/10.1007/978-981-10-7470-7_70","mag":"2777268178"},"language":"en","primary_location":{"id":"doi:10.1007/978-981-10-7470-7_70","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-10-7470-7_70","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038126820","display_name":"Rituparna Choudhury","orcid":"https://orcid.org/0000-0002-1273-009X"},"institutions":[{"id":"https://openalex.org/I9523339","display_name":"National Institute of Technology Meghalaya","ror":"https://ror.org/020vd6n84","country_code":"IN","type":"education","lineage":["https://openalex.org/I9523339"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rituparna Choudhury","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Meghalaya, Bijni Complex, Laitumkhrah, Shillong, 793003, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Meghalaya, Bijni Complex, Laitumkhrah, Shillong, 793003, India","institution_ids":["https://openalex.org/I9523339"]}]},{"author_position":"last","author":{"id":null,"display_name":"P. Rangababu","orcid":null},"institutions":[{"id":"https://openalex.org/I9523339","display_name":"National Institute of Technology Meghalaya","ror":"https://ror.org/020vd6n84","country_code":"IN","type":"education","lineage":["https://openalex.org/I9523339"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P. Rangababu","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Meghalaya, Bijni Complex, Laitumkhrah, Shillong, 793003, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Meghalaya, Bijni Complex, Laitumkhrah, Shillong, 793003, India","institution_ids":["https://openalex.org/I9523339"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5038126820"],"corresponding_institution_ids":["https://openalex.org/I9523339"],"apc_list":null,"apc_paid":null,"fwci":1.3356,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.84447539,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"742","last_page":"750"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7909812927246094},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7595423460006714},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6819106936454773},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.671270489692688},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6559944152832031},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5426031947135925},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5375316739082336},{"id":"https://openalex.org/keywords/block-size","display_name":"Block size","score":0.5356177091598511},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4620700478553772},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.46076205372810364},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4294445514678955},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38809746503829956},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3247785270214081}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7909812927246094},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7595423460006714},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6819106936454773},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.671270489692688},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6559944152832031},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5426031947135925},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5375316739082336},{"id":"https://openalex.org/C41431624","wikidata":"https://www.wikidata.org/wiki/Q1053357","display_name":"Block size","level":3,"score":0.5356177091598511},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4620700478553772},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.46076205372810364},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4294445514678955},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38809746503829956},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3247785270214081},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-981-10-7470-7_70","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-10-7470-7_70","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.5299999713897705,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1838550990","https://openalex.org/W1973060612","https://openalex.org/W1996844985","https://openalex.org/W2040830471","https://openalex.org/W2146395539","https://openalex.org/W2155294987","https://openalex.org/W2177167218","https://openalex.org/W2478836177","https://openalex.org/W2535828149"],"related_works":["https://openalex.org/W2596938593","https://openalex.org/W2056812584","https://openalex.org/W2614101859","https://openalex.org/W2355339201","https://openalex.org/W2754644930","https://openalex.org/W2068821215","https://openalex.org/W1991576731","https://openalex.org/W2055561624","https://openalex.org/W2796469349","https://openalex.org/W2032537205"],"abstract_inverted_index":null,"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}
