{"id":"https://openalex.org/W1490353197","doi":"https://doi.org/10.1007/978-3-642-84304-4_19","title":"ATTACC \u2014 an Automated Tool for Timing Analysis and Cell Characterization","display_name":"ATTACC \u2014 an Automated Tool for Timing Analysis and Cell Characterization","publication_year":1990,"publication_date":"1990-01-01","ids":{"openalex":"https://openalex.org/W1490353197","doi":"https://doi.org/10.1007/978-3-642-84304-4_19","mag":"1490353197"},"language":"de","primary_location":{"id":"doi:10.1007/978-3-642-84304-4_19","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-84304-4_19","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Rechnergest\u00fctzter Entwurf und Architektur mikroelektronischer Systeme","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057580958","display_name":"Thomas Schwederski","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"T. Schwederski","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Stuttgart 80, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Stuttgart 80, Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026026903","display_name":"T. B\u00fcchner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"T. B\u00fcchner","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Stuttgart 80, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Stuttgart 80, Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109407071","display_name":"W. Haas","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]},{"id":"https://openalex.org/I4210089203","display_name":"Cadence Design Systems (Germany)","ror":"https://ror.org/00d9ep044","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210089203","https://openalex.org/I66217453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"W. Haas","raw_affiliation_strings":["Cadence GmbH, M\u00fcnchen, Germany","Institute for Microelectronics Stuttgart, Stuttgart 80, Germany"],"affiliations":[{"raw_affiliation_string":"Cadence GmbH, M\u00fcnchen, Germany","institution_ids":["https://openalex.org/I4210089203"]},{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Stuttgart 80, Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070628089","display_name":"Manuel Zahn","orcid":"https://orcid.org/0000-0002-0040-4414"},"institutions":[{"id":"https://openalex.org/I24227732","display_name":"University of Applied Sciences Ravensburg-Weingarten","ror":"https://ror.org/00s4rmz74","country_code":"DE","type":"education","lineage":["https://openalex.org/I24227732"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Zahn","raw_affiliation_strings":["Fachhochschule Ravensburg-Weingarten, Germany"],"affiliations":[{"raw_affiliation_string":"Fachhochschule Ravensburg-Weingarten, Germany","institution_ids":["https://openalex.org/I24227732"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5057580958"],"corresponding_institution_ids":["https://openalex.org/I4210164948"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.24928503,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"221","last_page":"230"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7688812017440796},{"id":"https://openalex.org/keywords/documentation","display_name":"Documentation","score":0.7097299098968506},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5864615440368652},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.539618968963623},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5069101452827454},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5047899484634399},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4929530620574951},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47628679871559143},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45124009251594543},{"id":"https://openalex.org/keywords/design-tool","display_name":"Design tool","score":0.42471766471862793},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3296578526496887},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.292011559009552},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20025435090065002},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.1715572476387024},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1221163272857666},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.10726875066757202}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7688812017440796},{"id":"https://openalex.org/C56666940","wikidata":"https://www.wikidata.org/wiki/Q788790","display_name":"Documentation","level":2,"score":0.7097299098968506},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5864615440368652},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.539618968963623},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5069101452827454},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5047899484634399},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4929530620574951},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47628679871559143},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45124009251594543},{"id":"https://openalex.org/C2777466363","wikidata":"https://www.wikidata.org/wiki/Q17008971","display_name":"Design tool","level":2,"score":0.42471766471862793},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3296578526496887},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.292011559009552},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20025435090065002},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.1715572476387024},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1221163272857666},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.10726875066757202},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-84304-4_19","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-84304-4_19","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Rechnergest\u00fctzter Entwurf und Architektur mikroelektronischer Systeme","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1968172317","https://openalex.org/W2042664928","https://openalex.org/W2492292980","https://openalex.org/W2612150260","https://openalex.org/W6723335709"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W57337972","https://openalex.org/W1561306903","https://openalex.org/W2141823036","https://openalex.org/W2156279612"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
