{"id":"https://openalex.org/W1916634399","doi":"https://doi.org/10.1007/978-3-642-39074-6_9","title":"Boolean Logic Gates from a Single Memristor via Low-Level Sequential Logic","display_name":"Boolean Logic Gates from a Single Memristor via Low-Level Sequential Logic","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W1916634399","doi":"https://doi.org/10.1007/978-3-642-39074-6_9","mag":"1916634399"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-39074-6_9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-39074-6_9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058297979","display_name":"Ella Gale","orcid":"https://orcid.org/0000-0001-7448-7366"},"institutions":[{"id":"https://openalex.org/I178535277","display_name":"University of the West of England","ror":"https://ror.org/02nwg5t34","country_code":"GB","type":"education","lineage":["https://openalex.org/I178535277"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ella Gale","raw_affiliation_strings":["Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK","institution_ids":["https://openalex.org/I178535277"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015613473","display_name":"Ben de Lacy Costello","orcid":"https://orcid.org/0000-0003-2999-6801"},"institutions":[{"id":"https://openalex.org/I178535277","display_name":"University of the West of England","ror":"https://ror.org/02nwg5t34","country_code":"GB","type":"education","lineage":["https://openalex.org/I178535277"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ben de Lacy Costello","raw_affiliation_strings":["Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK","institution_ids":["https://openalex.org/I178535277"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036652783","display_name":"Andrew Adamatzky","orcid":"https://orcid.org/0000-0003-1073-2662"},"institutions":[{"id":"https://openalex.org/I178535277","display_name":"University of the West of England","ror":"https://ror.org/02nwg5t34","country_code":"GB","type":"education","lineage":["https://openalex.org/I178535277"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andrew Adamatzky","raw_affiliation_strings":["Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Unconventional Computing Group, Dept. of Applied Sciences & Dept. of Computer Science and Creative Technology, University of the West of England, Frenchay Campus, Coldhabour Lane, Bristol, BS16 5SR, UK","institution_ids":["https://openalex.org/I178535277"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":26.2037,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.99731561,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"79","last_page":"89"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12236","display_name":"Photoreceptor and optogenetics research","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.9372161626815796},{"id":"https://openalex.org/keywords/xor-gate","display_name":"XOR gate","score":0.6417997479438782},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6038118004798889},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5647301077842712},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4665503203868866},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.4411028027534485},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3690543472766876},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.3048899173736572},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.26299822330474854},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23715505003929138},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.21001282334327698},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15907436609268188},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.156609445810318},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.13747000694274902}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.9372161626815796},{"id":"https://openalex.org/C28495749","wikidata":"https://www.wikidata.org/wiki/Q155516","display_name":"XOR gate","level":3,"score":0.6417997479438782},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6038118004798889},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5647301077842712},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4665503203868866},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.4411028027534485},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3690543472766876},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.3048899173736572},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26299822330474854},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23715505003929138},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.21001282334327698},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15907436609268188},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.156609445810318},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.13747000694274902}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/978-3-642-39074-6_9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-39074-6_9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:research-information.bris.ac.uk:openaire_cris_publications/706e278f-7b39-4ec4-88d7-8a87931c778d","is_oa":false,"landing_page_url":"https://hdl.handle.net/1983/706e278f-7b39-4ec4-88d7-8a87931c778d","pdf_url":null,"source":{"id":"https://openalex.org/S7407055359","display_name":"Explore Bristol Research","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Gale, E, De Lacy Costello, B & Adamatzky, A 2013, Boolean logic gates from a single memristor via low-level sequential logic. in Unconventional Computation and Natural Computation - 12th International Conference, UCNC 2013, Proceedings. vol. 7956 LNCS, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 7956 LNCS, pp. 79-89. https://doi.org/10.1007/978-3-642-39074-6-9","raw_type":"contributionToPeriodical"},{"id":"pmh:oai:research-information.bris.ac.uk:publications/706e278f-7b39-4ec4-88d7-8a87931c778d","is_oa":false,"landing_page_url":"https://research-information.bris.ac.uk/en/publications/706e278f-7b39-4ec4-88d7-8a87931c778d","pdf_url":null,"source":{"id":"https://openalex.org/S7407055359","display_name":"Explore Bristol Research","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Gale, E, De Lacy Costello, B & Adamatzky, A 2013, Boolean logic gates from a single memristor via low-level sequential logic. in Unconventional Computation and Natural Computation - 12th International Conference, UCNC 2013, Proceedings. vol. 7956 LNCS, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 7956 LNCS, pp. 79-89. https://doi.org/10.1007/978-3-642-39074-6-9","raw_type":"contributionToPeriodical"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1514240988","https://openalex.org/W1544489725","https://openalex.org/W1979140888","https://openalex.org/W1990404128","https://openalex.org/W1993214330","https://openalex.org/W1995352804","https://openalex.org/W2025674646","https://openalex.org/W2030834420","https://openalex.org/W2073273918","https://openalex.org/W2092704633","https://openalex.org/W2098599811","https://openalex.org/W2112181056","https://openalex.org/W2145967274","https://openalex.org/W2162651880","https://openalex.org/W2240929658","https://openalex.org/W2964248723","https://openalex.org/W6832756664"],"related_works":["https://openalex.org/W1953553490","https://openalex.org/W2614631111","https://openalex.org/W4383888166","https://openalex.org/W2769046726","https://openalex.org/W4315700798","https://openalex.org/W2514437230","https://openalex.org/W2547440906","https://openalex.org/W4298334106","https://openalex.org/W2952928238","https://openalex.org/W2335248059"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":10},{"year":2013,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}