{"id":"https://openalex.org/W121910558","doi":"https://doi.org/10.1007/978-3-642-31494-0_44","title":"A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes","display_name":"A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes","publication_year":2012,"publication_date":"2012-01-01","ids":{"openalex":"https://openalex.org/W121910558","doi":"https://doi.org/10.1007/978-3-642-31494-0_44","mag":"121910558"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-31494-0_44","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-31494-0_44","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111410200","display_name":"Biswajit Patra","orcid":null},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Biswajit Patra","raw_affiliation_strings":["Qualcomm, India","[Qualcomm, India]"],"affiliations":[{"raw_affiliation_string":"Qualcomm, India","institution_ids":[]},{"raw_affiliation_string":"[Qualcomm, India]","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058651562","display_name":"Sanatan Chattopadhyay","orcid":"https://orcid.org/0000-0002-9038-5332"},"institutions":[{"id":"https://openalex.org/I106542073","display_name":"University of Calcutta","ror":"https://ror.org/01e7v7w47","country_code":"IN","type":"education","lineage":["https://openalex.org/I106542073"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santan Chattopadhyay","raw_affiliation_strings":["University of Calcutta, India","University of Calcutta, , India"],"affiliations":[{"raw_affiliation_string":"University of Calcutta, India","institution_ids":["https://openalex.org/I106542073"]},{"raw_affiliation_string":"University of Calcutta, , India","institution_ids":["https://openalex.org/I106542073"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043543748","display_name":"Amlan Chakrabarti","orcid":"https://orcid.org/0000-0003-4380-3172"},"institutions":[{"id":"https://openalex.org/I106542073","display_name":"University of Calcutta","ror":"https://ror.org/01e7v7w47","country_code":"IN","type":"education","lineage":["https://openalex.org/I106542073"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Amlan Chakrabarti","raw_affiliation_strings":["University of Calcutta, India","University of Calcutta, , India"],"affiliations":[{"raw_affiliation_string":"University of Calcutta, India","institution_ids":["https://openalex.org/I106542073"]},{"raw_affiliation_string":"University of Calcutta, , India","institution_ids":["https://openalex.org/I106542073"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5111410200"],"corresponding_institution_ids":["https://openalex.org/I19268510"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.9851,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.74013403,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"360","last_page":"363"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-drop","display_name":"Voltage drop","score":0.8270425796508789},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.7318004369735718},{"id":"https://openalex.org/keywords/drop","display_name":"Drop (telecommunication)","score":0.6754612922668457},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6458051800727844},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5874929428100586},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.46258068084716797},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.4517762064933777},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3720349669456482},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36465203762054443},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33663421869277954},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19125774502754211},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.16538935899734497},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12021216750144958}],"concepts":[{"id":"https://openalex.org/C82178898","wikidata":"https://www.wikidata.org/wiki/Q166839","display_name":"Voltage drop","level":3,"score":0.8270425796508789},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.7318004369735718},{"id":"https://openalex.org/C2781345722","wikidata":"https://www.wikidata.org/wiki/Q5308388","display_name":"Drop (telecommunication)","level":2,"score":0.6754612922668457},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6458051800727844},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5874929428100586},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.46258068084716797},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.4517762064933777},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3720349669456482},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36465203762054443},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33663421869277954},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19125774502754211},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.16538935899734497},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12021216750144958},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-31494-0_44","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-31494-0_44","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2018817743","https://openalex.org/W2102315438","https://openalex.org/W2140475081","https://openalex.org/W2149363078","https://openalex.org/W4253369885"],"related_works":["https://openalex.org/W2493360346","https://openalex.org/W2363818268","https://openalex.org/W2108172432","https://openalex.org/W2079629645","https://openalex.org/W4245545105","https://openalex.org/W2109799272","https://openalex.org/W2018764485","https://openalex.org/W4255681223","https://openalex.org/W2319035808","https://openalex.org/W2541000087"],"abstract_inverted_index":null,"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}