{"id":"https://openalex.org/W1547209693","doi":"https://doi.org/10.1007/978-3-642-17752-1_17","title":"Logic Architecture and VDD Selection for Reducing the Impact of Intra-die Random VT Variations on Timing","display_name":"Logic Architecture and VDD Selection for Reducing the Impact of Intra-die Random VT Variations on Timing","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W1547209693","doi":"https://doi.org/10.1007/978-3-642-17752-1_17","mag":"1547209693"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-17752-1_17","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-17752-1_17","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085620743","display_name":"Bahman Kheradmand\u2010Boroujeni","orcid":"https://orcid.org/0000-0002-4230-8228"},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]},{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Bahman Kheradmand-Boroujeni","raw_affiliation_strings":["Integrated and Wireless Systems, Centre Suisse d\u2019Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","Microelectronic Systems Laboratory, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland","Integrated and Wireless Systems, Centre Suisse d'Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated and Wireless Systems, Centre Suisse d\u2019Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","institution_ids":["https://openalex.org/I135218257"]},{"raw_affiliation_string":"Microelectronic Systems Laboratory, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"Integrated and Wireless Systems, Centre Suisse d'Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044663943","display_name":"Christian Piguet","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Christian Piguet","raw_affiliation_strings":["Integrated and Wireless Systems, Centre Suisse d\u2019Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","Integrated and Wireless Systems, Centre Suisse d'Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated and Wireless Systems, Centre Suisse d\u2019Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","institution_ids":["https://openalex.org/I135218257"]},{"raw_affiliation_string":"Integrated and Wireless Systems, Centre Suisse d'Electronique et de Microtechnique (CSEM), Neuch\u00e2tel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072423303","display_name":"Yusuf Leblebici","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Yusuf Leblebici","raw_affiliation_strings":["Microelectronic Systems Laboratory, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronic Systems Laboratory, Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.4475,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.51235423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"170","last_page":"179"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6495797038078308},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6061317324638367},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5788980722427368},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5657163262367249},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.5438031554222107},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.4928920269012451},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.475788950920105},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.4608544707298279},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4387635886669159},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41641420125961304},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.39420756697654724},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33655866980552673},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3364558219909668},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.32623183727264404},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22198399901390076},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15360072255134583},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13018745183944702},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08261069655418396}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6495797038078308},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6061317324638367},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5788980722427368},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5657163262367249},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.5438031554222107},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.4928920269012451},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.475788950920105},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.4608544707298279},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4387635886669159},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41641420125961304},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.39420756697654724},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33655866980552673},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3364558219909668},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.32623183727264404},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22198399901390076},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15360072255134583},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13018745183944702},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08261069655418396},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-17752-1_17","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-17752-1_17","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W160671272","https://openalex.org/W275470402","https://openalex.org/W1575022128","https://openalex.org/W1580018055","https://openalex.org/W1971662529","https://openalex.org/W2041626447","https://openalex.org/W2087862382","https://openalex.org/W2099528297","https://openalex.org/W2117708718","https://openalex.org/W2126607849","https://openalex.org/W2157653110","https://openalex.org/W3142793030","https://openalex.org/W4365799988"],"related_works":["https://openalex.org/W2082591327","https://openalex.org/W2580743037","https://openalex.org/W3023368799","https://openalex.org/W2159448561","https://openalex.org/W2102826383","https://openalex.org/W2167525841","https://openalex.org/W2137041830","https://openalex.org/W1558283416","https://openalex.org/W4250383491","https://openalex.org/W2152533674"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
