{"id":"https://openalex.org/W1508557703","doi":"https://doi.org/10.1007/978-3-642-15297-9_3","title":"Property-Based Monitoring of Analog and Mixed-Signal Systems","display_name":"Property-Based Monitoring of Analog and Mixed-Signal Systems","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W1508557703","doi":"https://doi.org/10.1007/978-3-642-15297-9_3","mag":"1508557703"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-15297-9_3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-15297-9_3","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070577608","display_name":"John Havlicek","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"John Havlicek","raw_affiliation_strings":["Freescale Semiconductor, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024750161","display_name":"Scott Little","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Scott Little","raw_affiliation_strings":["Freescale Semiconductor, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012209374","display_name":"Oded Maler","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Oded Maler","raw_affiliation_strings":["Verimag, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Verimag, Grenoble, France","institution_ids":["https://openalex.org/I4210156361"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052399473","display_name":"Dejan Ni\u010dkovi\u0107","orcid":"https://orcid.org/0000-0001-5468-0396"},"institutions":[{"id":"https://openalex.org/I157556583","display_name":"Institute of Science and Technology Austria","ror":"https://ror.org/03gnh5541","country_code":"AT","type":"education","lineage":["https://openalex.org/I157556583"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Dejan Nickovic","raw_affiliation_strings":["IST Austria, Klosterneuburg, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IST Austria, Klosterneuburg, Austria","institution_ids":["https://openalex.org/I157556583"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.6105,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.55937315,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"23","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.7350000143051147,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.7350000143051147,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11236","display_name":"Control Systems and Identification","score":0.6899999976158142,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.626800000667572,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8115239143371582},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7219394445419312},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.6461924910545349},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.5474073886871338},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5254932045936584},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.473565936088562},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4699347913265228},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.4285157322883606},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.36875462532043457},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36445897817611694},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3030199408531189},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.23771452903747559},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.23445987701416016},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.22532439231872559},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.18567276000976562}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8115239143371582},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7219394445419312},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.6461924910545349},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.5474073886871338},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5254932045936584},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.473565936088562},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4699347913265228},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.4285157322883606},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.36875462532043457},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36445897817611694},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3030199408531189},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.23771452903747559},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.23445987701416016},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.22532439231872559},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.18567276000976562},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-15297-9_3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-15297-9_3","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2111870610","https://openalex.org/W1937494301","https://openalex.org/W2185815555","https://openalex.org/W2171373553","https://openalex.org/W2053330176","https://openalex.org/W1652461478","https://openalex.org/W2106026059","https://openalex.org/W2116226449","https://openalex.org/W4389495993","https://openalex.org/W2011619270"],"abstract_inverted_index":null,"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-04T08:18:43.703281","created_date":"2025-10-10T00:00:00"}
