{"id":"https://openalex.org/W1533306272","doi":"https://doi.org/10.1007/978-3-642-12214-9_20","title":"Power Consumption Analysis of Direct, Set Associative and Phased Set Associative Cache Organizations in Alpha AXP 21064 Processor","display_name":"Power Consumption Analysis of Direct, Set Associative and Phased Set Associative Cache Organizations in Alpha AXP 21064 Processor","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W1533306272","doi":"https://doi.org/10.1007/978-3-642-12214-9_20","mag":"1533306272"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-12214-9_20","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-12214-9_20","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108358343","display_name":"M. Kannan","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Megalingam Rajesh Kannan","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077392870","display_name":"K. B. Deepu","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. B. Deepu","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051336259","display_name":"Joseph P. Iype","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Joseph P. Iype","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100832407","display_name":"Parthasarathy Ravishankar","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ravishankar Parthasarathy","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039482966","display_name":"Gautham Popuri","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Popuri Gautham","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Amrita School Of Engineering, Amritapuri","institution_ids":["https://openalex.org/I81556334"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5108358343"],"corresponding_institution_ids":["https://openalex.org/I81556334"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.1640625,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"114","last_page":"119"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.988099992275238,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.988099992275238,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9836999773979187,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7736047506332397},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7412357926368713},{"id":"https://openalex.org/keywords/associative-property","display_name":"Associative property","score":0.7125737071037292},{"id":"https://openalex.org/keywords/power-set","display_name":"Power set","score":0.5616926550865173},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5284355282783508},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5132272243499756},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4828839600086212},{"id":"https://openalex.org/keywords/modelsim","display_name":"ModelSim","score":0.43143048882484436},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.42178580164909363},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30805689096450806},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.12895512580871582},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10601377487182617},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08374738693237305}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7736047506332397},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7412357926368713},{"id":"https://openalex.org/C159423971","wikidata":"https://www.wikidata.org/wiki/Q177251","display_name":"Associative property","level":2,"score":0.7125737071037292},{"id":"https://openalex.org/C100643331","wikidata":"https://www.wikidata.org/wiki/Q205170","display_name":"Power set","level":3,"score":0.5616926550865173},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5284355282783508},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5132272243499756},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4828839600086212},{"id":"https://openalex.org/C2778571676","wikidata":"https://www.wikidata.org/wiki/Q3317826","display_name":"ModelSim","level":4,"score":0.43143048882484436},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.42178580164909363},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30805689096450806},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.12895512580871582},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10601377487182617},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08374738693237305},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-12214-9_20","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-12214-9_20","pdf_url":null,"source":{"id":"https://openalex.org/S2764900261","display_name":"Communications in computer and information science","issn_l":"1865-0929","issn":["1865-0929","1865-0937"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Communications in Computer and Information Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1970454100","https://openalex.org/W2004580040","https://openalex.org/W2094789249","https://openalex.org/W2101069312","https://openalex.org/W2135885084","https://openalex.org/W2153099552","https://openalex.org/W4231070018"],"related_works":["https://openalex.org/W2347617805","https://openalex.org/W2389765791","https://openalex.org/W2377898907","https://openalex.org/W2376047108","https://openalex.org/W2622925720","https://openalex.org/W2087719824","https://openalex.org/W4233287471","https://openalex.org/W2377135490","https://openalex.org/W4281629491","https://openalex.org/W2378961448"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-05-14T08:36:36.166977","created_date":"2025-10-10T00:00:00"}