{"id":"https://openalex.org/W1877194464","doi":"https://doi.org/10.1007/978-3-642-11802-9_9","title":"Clock Repeater Characterization for Jitter-Aware Clock Tree Synthesis","display_name":"Clock Repeater Characterization for Jitter-Aware Clock Tree Synthesis","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W1877194464","doi":"https://doi.org/10.1007/978-3-642-11802-9_9","mag":"1877194464"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-11802-9_9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-11802-9_9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032838020","display_name":"M\u00f3nica Figueiredo","orcid":"https://orcid.org/0000-0002-0780-3725"},"institutions":[{"id":"https://openalex.org/I169427155","display_name":"Instituto Polit\u00e9cnico de Leiria","ror":"https://ror.org/010dvvh94","country_code":"PT","type":"education","lineage":["https://openalex.org/I169427155"]},{"id":"https://openalex.org/I3133160195","display_name":"Instituto Superior de Gest\u00e3o","ror":"https://ror.org/05mnej980","country_code":"PT","type":"education","lineage":["https://openalex.org/I3133160195"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Monica Figueiredo","raw_affiliation_strings":["Instituto Polit\u00e9cnico de Leiria, Escola Superior de Tecnologia e Gest\u00e3o,","Instituto Polit\u00e9cnico de Leiria. Escola Superior de Tecnologia e Gest\u00e3o"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto Polit\u00e9cnico de Leiria, Escola Superior de Tecnologia e Gest\u00e3o,","institution_ids":["https://openalex.org/I169427155","https://openalex.org/I3133160195"]},{"raw_affiliation_string":"Instituto Polit\u00e9cnico de Leiria. Escola Superior de Tecnologia e Gest\u00e3o","institution_ids":["https://openalex.org/I169427155"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090429145","display_name":"Rui L. Aguiar","orcid":"https://orcid.org/0000-0003-0107-6253"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I60858718","display_name":"University of Aveiro","ror":"https://ror.org/00nt41z93","country_code":"PT","type":"education","lineage":["https://openalex.org/I60858718"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Rui L. Aguiar","raw_affiliation_strings":["Dpt. Electr\u00f3nica e Telecomunica\u00e7\u00f5es, Instituto de Telecomunica\u00e7\u00f5es, Universidade de Aveiro, Leiria, Aveiro, Portugal","Dpt. Electr\u00f3nica e Telecomunica\u00e7\u00f5es, Instituto de Telecomunica\u00e7\u00f5es, Universidade de Aveiro, Leiria, Aveiro, Portugal#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dpt. Electr\u00f3nica e Telecomunica\u00e7\u00f5es, Instituto de Telecomunica\u00e7\u00f5es, Universidade de Aveiro, Leiria, Aveiro, Portugal","institution_ids":["https://openalex.org/I4210120471"]},{"raw_affiliation_string":"Dpt. Electr\u00f3nica e Telecomunica\u00e7\u00f5es, Instituto de Telecomunica\u00e7\u00f5es, Universidade de Aveiro, Leiria, Aveiro, Portugal#TAB#","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I60858718"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.8901,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.66624685,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"46","last_page":"55"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8583429455757141},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7922523021697998},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.6390526294708252},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5792351365089417},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5012292861938477},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.49489134550094604},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48304611444473267},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.46487975120544434},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.460148423910141},{"id":"https://openalex.org/keywords/repeater","display_name":"Repeater (horology)","score":0.4451161324977875},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.4286212921142578},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.41134893894195557},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38469475507736206},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.3055552840232849},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2722567319869995},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1560247540473938},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11501145362854004},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09080833196640015},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.06914007663726807}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8583429455757141},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7922523021697998},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.6390526294708252},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5792351365089417},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5012292861938477},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.49489134550094604},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48304611444473267},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.46487975120544434},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.460148423910141},{"id":"https://openalex.org/C195545963","wikidata":"https://www.wikidata.org/wiki/Q1469803","display_name":"Repeater (horology)","level":3,"score":0.4451161324977875},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.4286212921142578},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.41134893894195557},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38469475507736206},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3055552840232849},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2722567319869995},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1560247540473938},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11501145362854004},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09080833196640015},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.06914007663726807},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-11802-9_9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-11802-9_9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1501346096","https://openalex.org/W2079770493","https://openalex.org/W2096249168","https://openalex.org/W2101929352","https://openalex.org/W2105974573","https://openalex.org/W2107880456","https://openalex.org/W2114834460","https://openalex.org/W2118565267","https://openalex.org/W2133276614","https://openalex.org/W2137807823","https://openalex.org/W2142850552","https://openalex.org/W2160658599","https://openalex.org/W2162621524","https://openalex.org/W3092521657","https://openalex.org/W4241311691","https://openalex.org/W4245501382","https://openalex.org/W4248944487"],"related_works":["https://openalex.org/W3006003651","https://openalex.org/W2088914741","https://openalex.org/W4247180033","https://openalex.org/W2133326759","https://openalex.org/W2040807843","https://openalex.org/W4249038728","https://openalex.org/W1564063853","https://openalex.org/W2559451387","https://openalex.org/W4230501858","https://openalex.org/W60672686"],"abstract_inverted_index":null,"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}