{"id":"https://openalex.org/W1570065973","doi":"https://doi.org/10.1007/978-3-642-11802-9_27","title":"Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering","display_name":"Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W1570065973","doi":"https://doi.org/10.1007/978-3-642-11802-9_27","mag":"1570065973"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-11802-9_27","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-11802-9_27","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046161373","display_name":"Gaurang Upasani","orcid":"https://orcid.org/0009-0004-6163-7627"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gaurang Upasani","raw_affiliation_strings":["Politecnico di Torino, Torino, 10129, Italy","Politecnico di Torino, Torino, Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, 10129, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy,","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034581393","display_name":"Andrea Calimera","orcid":"https://orcid.org/0000-0001-5881-3811"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Calimera","raw_affiliation_strings":["Politecnico di Torino, Torino, 10129, Italy","Politecnico di Torino, Torino, Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, 10129, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy,","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058379509","display_name":"Alberto Macii","orcid":"https://orcid.org/0000-0002-8869-5710"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alberto Macii","raw_affiliation_strings":["Politecnico di Torino, Torino, 10129, Italy","Politecnico di Torino, Torino, Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, 10129, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy,","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005432629","display_name":"Enrico Macii","orcid":"https://orcid.org/0000-0001-9046-5618"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Enrico Macii","raw_affiliation_strings":["Politecnico di Torino, Torino, 10129, Italy","Politecnico di Torino, Torino, Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, 10129, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy,","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024891882","display_name":"Massimo Poncino","orcid":"https://orcid.org/0000-0002-1369-9688"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Massimo Poncino","raw_affiliation_strings":["Politecnico di Torino, Torino, 10129, Italy","Politecnico di Torino, Torino, Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, 10129, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy,","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.8901,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.6636567,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"227","last_page":"236"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8082343339920044},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.76170814037323},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.645591139793396},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.628101110458374},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.6153253316879272},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.5310381054878235},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5200726389884949},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.49551379680633545},{"id":"https://openalex.org/keywords/gating","display_name":"Gating","score":0.45373833179473877},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.435880184173584},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4271402359008789},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4184499680995941},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.38772112131118774},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35722628235816956},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.320453405380249},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.15642768144607544},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.14760076999664307},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.14650088548660278},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11185479164123535},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10565882921218872},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10339576005935669},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07945016026496887}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8082343339920044},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.76170814037323},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.645591139793396},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.628101110458374},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.6153253316879272},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.5310381054878235},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5200726389884949},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.49551379680633545},{"id":"https://openalex.org/C194544171","wikidata":"https://www.wikidata.org/wiki/Q21105679","display_name":"Gating","level":2,"score":0.45373833179473877},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.435880184173584},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4271402359008789},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4184499680995941},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.38772112131118774},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35722628235816956},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.320453405380249},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.15642768144607544},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.14760076999664307},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.14650088548660278},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11185479164123535},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10565882921218872},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10339576005935669},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07945016026496887},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C42407357","wikidata":"https://www.wikidata.org/wiki/Q521","display_name":"Physiology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/978-3-642-11802-9_27","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-11802-9_27","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:porto.polito.it:2292306","is_oa":false,"landing_page_url":"http://porto.polito.it/2292306/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0302-9743","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7699999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2002533296","https://openalex.org/W2109797003","https://openalex.org/W2131619025","https://openalex.org/W2131862714","https://openalex.org/W2153087216","https://openalex.org/W2154095011","https://openalex.org/W2161455936","https://openalex.org/W2170666639","https://openalex.org/W3140585965"],"related_works":["https://openalex.org/W2152979262","https://openalex.org/W2485892467","https://openalex.org/W4252084893","https://openalex.org/W1949070338","https://openalex.org/W4390197045","https://openalex.org/W1510566755","https://openalex.org/W2421981162","https://openalex.org/W4562818","https://openalex.org/W2053857784","https://openalex.org/W4254183379"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-08-04T08:18:43.703281","created_date":"2025-10-10T00:00:00"}