{"id":"https://openalex.org/W1557267525","doi":"https://doi.org/10.1007/978-3-642-00454-4_24","title":"Evaluating CMPs and Their Memory Architecture","display_name":"Evaluating CMPs and Their Memory Architecture","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W1557267525","doi":"https://doi.org/10.1007/978-3-642-00454-4_24","mag":"1557267525"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-00454-4_24","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-00454-4_24","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077847640","display_name":"Chris Jesshope","orcid":null},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Chris Jesshope","raw_affiliation_strings":["Institute for Informatics, University of Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Informatics, University of Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047939440","display_name":"Mike Lankamp","orcid":null},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Mike Lankamp","raw_affiliation_strings":["Institute for Informatics, University of Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Informatics, University of Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100425431","display_name":"Li Zhang","orcid":"https://orcid.org/0000-0001-7293-8119"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Li Zhang","raw_affiliation_strings":["Institute for Informatics, University of Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Informatics, University of Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I887064364"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":1.463,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.81516401,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"246","last_page":"257"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8703488707542419},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.675806999206543},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6228913068771362},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5882972478866577},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5466967821121216},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.49565446376800537},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.47550636529922485},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4625057578086853},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4547105133533478},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.43032923340797424},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.42380568385124207},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.40678972005844116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3880807161331177},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.2989390790462494},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26115426421165466},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.09225523471832275}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8703488707542419},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.675806999206543},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6228913068771362},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5882972478866577},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5466967821121216},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.49565446376800537},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.47550636529922485},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4625057578086853},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4547105133533478},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.43032923340797424},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.42380568385124207},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.40678972005844116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3880807161331177},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2989390790462494},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26115426421165466},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.09225523471832275},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1007/978-3-642-00454-4_24","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-00454-4_24","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:dare.uva.nl:openaire_cris_publications/ae041c5f-55f0-4bf6-a77b-21eb3cd3dd37","is_oa":false,"landing_page_url":"https://handle.uba.uva.nl/personal/pure/en/publications/evaluating-cmps-and-their-memory-architecture(ae041c5f-55f0-4bf6-a77b-21eb3cd3dd37).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400088","display_name":"UvA-DARE (University of Amsterdam)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I887064364","host_organization_name":"University of Amsterdam","host_organization_lineage":["https://openalex.org/I887064364"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Jesshope, C, Lankamp, M & Zhang, L 2009, Evaluating CMPs and their memory architecture. in M Berekovic, C M\u00fcller-Schloer, C Hochberger & S Wong (eds), Architecture of Computing Systems \u2013 ARCS 2009 : 22nd International Conference, Delft, The Netherlands, March 10-13, 2009 : proceedings. Lecture Notes in Computer Science, vol. 5455, Berlin, pp. 246-257, ARCS 2009 - Achitecture of Computing Systems, Delft, the Netherlands, 10/03/09. https://doi.org/10.1007/978-3-642-00454-4_24","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.156.6572","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.156.6572","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://staff.science.uva.nl/~jesshope/Papers/ARCS09.pdf","raw_type":"text"},{"id":"pmh:uvapub:oai:dare.uva.nl:publications/ae041c5f-55f0-4bf6-a77b-21eb3cd3dd37","is_oa":false,"landing_page_url":"https://dare.uva.nl/personal/pure/en/publications/evaluating-cmps-and-their-memory-architecture(ae041c5f-55f0-4bf6-a77b-21eb3cd3dd37).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Architecture of Computing Systems \u2013 ARCS 2009: 22nd International Conference, Delft, The Netherlands, March 10-13, 2009 : proceedings, 246 - 257","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1553795293","https://openalex.org/W1573807170","https://openalex.org/W1832931685","https://openalex.org/W1969885689","https://openalex.org/W2059807497","https://openalex.org/W2083885893","https://openalex.org/W2118102322","https://openalex.org/W2119047985","https://openalex.org/W2145022480","https://openalex.org/W2158094629","https://openalex.org/W2243493944","https://openalex.org/W2788685475","https://openalex.org/W2915470787"],"related_works":["https://openalex.org/W1974211070","https://openalex.org/W1998129367","https://openalex.org/W2096506606","https://openalex.org/W2145484885","https://openalex.org/W2047684617","https://openalex.org/W2790267391","https://openalex.org/W2168550483","https://openalex.org/W1553814981","https://openalex.org/W2317681778","https://openalex.org/W4248376446"],"abstract_inverted_index":null,"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-08-04T08:18:43.703281","created_date":"2025-10-10T00:00:00"}