{"id":"https://openalex.org/W1644782203","doi":"https://doi.org/10.1007/978-3-540-89439-1_25","title":"Reveal: A Formal Verification Tool for Verilog Designs","display_name":"Reveal: A Formal Verification Tool for Verilog Designs","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W1644782203","doi":"https://doi.org/10.1007/978-3-540-89439-1_25","mag":"1644782203"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-89439-1_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-89439-1_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046558152","display_name":"Zaher S. Andraus","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Zaher S. Andraus","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009613676","display_name":"Mark H. Liffiton","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark H. Liffiton","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077314055","display_name":"Karem A. Sakallah","orcid":"https://orcid.org/0000-0002-5819-9089"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Karem A. Sakallah","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5046558152"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":1.152,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.77006832,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"343","last_page":"352"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.886177659034729},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6427546739578247},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5951899886131287},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.5681329369544983},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.5098173022270203},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.49419358372688293},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3397131860256195},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2634396553039551},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.05005428194999695}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.886177659034729},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6427546739578247},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5951899886131287},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5681329369544983},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.5098173022270203},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.49419358372688293},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3397131860256195},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2634396553039551},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.05005428194999695}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/978-3-540-89439-1_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-89439-1_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.158.4122","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.158.4122","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eecs.umich.edu/~liffiton/publications/lpar08_andraus_reveal.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1538592187","https://openalex.org/W1555915743","https://openalex.org/W1592502301","https://openalex.org/W1605593319","https://openalex.org/W1741528175","https://openalex.org/W1822320350","https://openalex.org/W2004936005","https://openalex.org/W2020169768","https://openalex.org/W2043100293","https://openalex.org/W2080593426","https://openalex.org/W2108065216","https://openalex.org/W2125967324","https://openalex.org/W2134147303","https://openalex.org/W2137249130","https://openalex.org/W2141393830","https://openalex.org/W2158395308","https://openalex.org/W2164829820","https://openalex.org/W2788962374","https://openalex.org/W3148982686","https://openalex.org/W4302599276"],"related_works":["https://openalex.org/W1761969858","https://openalex.org/W2391854357","https://openalex.org/W2152752131","https://openalex.org/W3114194214","https://openalex.org/W161255303","https://openalex.org/W1748531671","https://openalex.org/W1544097700","https://openalex.org/W1488573418","https://openalex.org/W4206948312","https://openalex.org/W1922520186"],"abstract_inverted_index":null,"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
