{"id":"https://openalex.org/W4236108378","doi":"https://doi.org/10.1007/978-3-540-74442-9","title":"Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation","display_name":"Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W4236108378","doi":"https://doi.org/10.1007/978-3-540-74442-9"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-74442-9","is_oa":false,"landing_page_url":"http://doi.org/10.1007/978-3-540-74442-9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book"},"type":"book","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-00399609","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Azemard, Nadine","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Azemard, Nadine","raw_affiliation_strings":["COMPSYS - Compilation and embedded computing systems (46 All\u00e9e d'Italie \r\n69364 Lyon France - France)"],"affiliations":[{"raw_affiliation_string":"COMPSYS - Compilation and embedded computing systems (46 All\u00e9e d'Italie \r\n69364 Lyon France - France)","institution_ids":[]}]},{"author_position":"last","author":{"id":null,"display_name":"Svensson, Lars","orcid":null},"institutions":[{"id":"https://openalex.org/I48430043","display_name":"Institut National des Sciences Appliqu\u00e9es de Lyon","ror":"https://ror.org/050jn9y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I203339264","https://openalex.org/I48430043"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Svensson, Lars","raw_affiliation_strings":["COMPSYS - Compilation and embedded computing systems (46 All\u00e9e d'Italie \r\n69364 Lyon France - France)","CITI - CITI Centre of Innovation in Telecommunications and Integration of services (CITI Laboratory, INSA Lyon Domaine Scientifique de la Doua Batiment Claude Chappe 6 avenue des Arts 69621 Villeurbanne Cedex Phone +33 4 7243 6415 Fax +33 4 7243 6227 E-Mail citi@insa-lyon.fr - France)"],"affiliations":[{"raw_affiliation_string":"COMPSYS - Compilation and embedded computing systems (46 All\u00e9e d'Italie \r\n69364 Lyon France - France)","institution_ids":[]},{"raw_affiliation_string":"CITI - CITI Centre of Innovation in Telecommunications and Integration of services (CITI Laboratory, INSA Lyon Domaine Scientifique de la Doua Batiment Claude Chappe 6 avenue des Arts 69621 Villeurbanne Cedex Phone +33 4 7243 6415 Fax +33 4 7243 6227 E-Mail citi@insa-lyon.fr - France)","institution_ids":["https://openalex.org/I48430043"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.17547293,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9902999997138977,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9883999824523926,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8272379636764526},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4492638111114502},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.43121832609176636},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.41826269030570984},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3624489903450012},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33401811122894287},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1929776966571808}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8272379636764526},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4492638111114502},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.43121832609176636},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.41826269030570984},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3624489903450012},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33401811122894287},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1929776966571808},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/978-3-540-74442-9","is_oa":false,"landing_page_url":"http://doi.org/10.1007/978-3-540-74442-9","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book"},{"id":"pmh:oai:HAL:hal-00399609v1","is_oa":true,"landing_page_url":"https://hal.science/hal-00399609","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, Sep 2007, Gothenburg, Sweden. pp.10-19, &#x27E8;10.1007/978-3-540-74442-9&#x27E9;","raw_type":"Conference papers"},{"id":"pmh:oai:dial.uclouvain.be:ebook:7274","is_oa":false,"landing_page_url":"http://hdl.handle.net/2078/ebook:7274","pdf_url":null,"source":{"id":"https://openalex.org/S4306401902","display_name":"Digital Access to Libraries (Universit\u00e9 catholique de Louvain (UCL), l'Universit\u00e9 de Namur (UNamur) and the Universit\u00e9 Saint-Louis (USL-B))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I95674353","host_organization_name":"UCLouvain","host_organization_lineage":["https://openalex.org/I95674353"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"pmh:oai:HAL:hal-00399609v1","is_oa":true,"landing_page_url":"https://hal.science/hal-00399609","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, Sep 2007, Gothenburg, Sweden. pp.10-19, &#x27E8;10.1007/978-3-540-74442-9&#x27E9;","raw_type":"Conference papers"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5899999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W139065849","https://openalex.org/W1862240612","https://openalex.org/W2000419842","https://openalex.org/W2097521061","https://openalex.org/W2103402005","https://openalex.org/W2124567303","https://openalex.org/W2169826970","https://openalex.org/W2244049578","https://openalex.org/W4230548926","https://openalex.org/W4240259771"],"related_works":["https://openalex.org/W2383563100","https://openalex.org/W2393658466","https://openalex.org/W4248234938","https://openalex.org/W1981084410","https://openalex.org/W2078506771","https://openalex.org/W2914442136","https://openalex.org/W2368652795","https://openalex.org/W2391880898","https://openalex.org/W2165627905","https://openalex.org/W2744948163"],"abstract_inverted_index":null,"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-03-25T23:56:10.502304","created_date":"2022-05-12T00:00:00"}
