{"id":"https://openalex.org/W1521313210","doi":"https://doi.org/10.1007/978-3-540-73940-1_52","title":"SCRF \u2013 A Hybrid Register File Architecture","display_name":"SCRF \u2013 A Hybrid Register File Architecture","publication_year":2007,"publication_date":"2007-08-28","ids":{"openalex":"https://openalex.org/W1521313210","doi":"https://doi.org/10.1007/978-3-540-73940-1_52","mag":"1521313210"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-73940-1_52","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-73940-1_52","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054099869","display_name":"Jer-Yu Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Jer-Yu Hsu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038906481","display_name":"Yan-Zu Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yan-Zu Wu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061101387","display_name":"Xuan-Yi Lin","orcid":"https://orcid.org/0000-0002-0343-7043"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Xuan-Yi Lin","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043627040","display_name":"Yeh\u2010Ching Chung","orcid":"https://orcid.org/0000-0002-8704-9821"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yeh-Ching Chung","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, 30013, Taiwan, R.O.C","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan R.O.C","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5054099869"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.5004,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64657738,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"525","last_page":"536"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8851688504219055},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.8350784778594971},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.7446497678756714},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5826598405838013},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.5721399188041687},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5596475601196289},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44510456919670105},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2441350519657135},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.15473589301109314},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15217575430870056},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.11268427968025208}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8851688504219055},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.8350784778594971},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.7446497678756714},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5826598405838013},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.5721399188041687},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5596475601196289},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44510456919670105},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2441350519657135},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.15473589301109314},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15217575430870056},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.11268427968025208},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-540-73940-1_52","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-73940-1_52","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1561560534","https://openalex.org/W1965644719","https://openalex.org/W1990840846","https://openalex.org/W2040167141","https://openalex.org/W2091306634","https://openalex.org/W2093650773","https://openalex.org/W2111377238","https://openalex.org/W2117285153","https://openalex.org/W2118866757","https://openalex.org/W2124107492","https://openalex.org/W2127032537","https://openalex.org/W2128377351","https://openalex.org/W2139438850","https://openalex.org/W2147692971","https://openalex.org/W3148529197"],"related_works":["https://openalex.org/W2224192221","https://openalex.org/W1967889241","https://openalex.org/W2111377238","https://openalex.org/W2161297616","https://openalex.org/W3117494601","https://openalex.org/W4247209662","https://openalex.org/W2159389028","https://openalex.org/W2195435904","https://openalex.org/W2148662141","https://openalex.org/W3022691489"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}