{"id":"https://openalex.org/W1512842870","doi":"https://doi.org/10.1007/978-3-540-69303-1_16","title":"A New Memory Allocation Model for Parallel Search Space Data Structures with OpenMP","display_name":"A New Memory Allocation Model for Parallel Search Space Data Structures with OpenMP","publication_year":2008,"publication_date":"2008-08-12","ids":{"openalex":"https://openalex.org/W1512842870","doi":"https://doi.org/10.1007/978-3-540-69303-1_16","mag":"1512842870"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-69303-1_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-69303-1_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107859884","display_name":"Christophe Jaillet","orcid":null},"institutions":[{"id":"https://openalex.org/I96226040","display_name":"Universit\u00e9 de Reims Champagne-Ardenne","ror":"https://ror.org/03hypw319","country_code":"FR","type":"education","lineage":["https://openalex.org/I96226040"]},{"id":"https://openalex.org/I4210100943","display_name":"Centre de Recherche en Sciences et Technologies de l'Information et de la Communication","ror":"https://ror.org/016wdna72","country_code":"FR","type":"facility","lineage":["https://openalex.org/I154526488","https://openalex.org/I4210100943","https://openalex.org/I4210141980","https://openalex.org/I96226040"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Christophe Jaillet","raw_affiliation_strings":["CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, \u00a0","CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, 51687#TAB#"],"affiliations":[{"raw_affiliation_string":"CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, \u00a0","institution_ids":["https://openalex.org/I96226040"]},{"raw_affiliation_string":"CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, 51687#TAB#","institution_ids":["https://openalex.org/I96226040","https://openalex.org/I4210100943"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085266102","display_name":"Micha\u00ebl Krajecki","orcid":"https://orcid.org/0000-0001-8419-1948"},"institutions":[{"id":"https://openalex.org/I96226040","display_name":"Universit\u00e9 de Reims Champagne-Ardenne","ror":"https://ror.org/03hypw319","country_code":"FR","type":"education","lineage":["https://openalex.org/I96226040"]},{"id":"https://openalex.org/I4210100943","display_name":"Centre de Recherche en Sciences et Technologies de l'Information et de la Communication","ror":"https://ror.org/016wdna72","country_code":"FR","type":"facility","lineage":["https://openalex.org/I154526488","https://openalex.org/I4210100943","https://openalex.org/I4210141980","https://openalex.org/I96226040"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Micha\u00ebl Krajecki","raw_affiliation_strings":["CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, \u00a0","CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, 51687#TAB#"],"affiliations":[{"raw_affiliation_string":"CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, \u00a0","institution_ids":["https://openalex.org/I96226040"]},{"raw_affiliation_string":"CReSTIC SysCom, Universit\u00e9 de Reims Champagne-Ardenne, Reims cedex 2, 51687#TAB#","institution_ids":["https://openalex.org/I96226040","https://openalex.org/I4210100943"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5107859884"],"corresponding_institution_ids":["https://openalex.org/I4210100943","https://openalex.org/I96226040"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.4708,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.63338109,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"148","last_page":"152"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8971908092498779},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7507105469703674},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.7405005097389221},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.6496139764785767},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.5950952768325806},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.5947225093841553},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5414630770683289},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.514037013053894},{"id":"https://openalex.org/keywords/memory-model","display_name":"Memory model","score":0.5133287310600281},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.506995677947998},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.48180216550827026},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.4368676543235779},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.43064674735069275},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.4178427457809448},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3065319061279297},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2515794634819031},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.18766635656356812},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.181504487991333},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.15781885385513306},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.102824866771698}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8971908092498779},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7507105469703674},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.7405005097389221},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.6496139764785767},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.5950952768325806},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.5947225093841553},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5414630770683289},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.514037013053894},{"id":"https://openalex.org/C12186640","wikidata":"https://www.wikidata.org/wiki/Q6815743","display_name":"Memory model","level":3,"score":0.5133287310600281},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.506995677947998},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.48180216550827026},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.4368676543235779},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.43064674735069275},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.4178427457809448},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3065319061279297},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2515794634819031},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.18766635656356812},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.181504487991333},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.15781885385513306},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.102824866771698}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-540-69303-1_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-69303-1_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1556859836","https://openalex.org/W2105037993","https://openalex.org/W2109829813","https://openalex.org/W2113287010","https://openalex.org/W2401165420"],"related_works":["https://openalex.org/W254684032","https://openalex.org/W2781952239","https://openalex.org/W1848192231","https://openalex.org/W4317827391","https://openalex.org/W2105141138","https://openalex.org/W2247651031","https://openalex.org/W2318923906","https://openalex.org/W2270763743","https://openalex.org/W2560368221","https://openalex.org/W120214571"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
