{"id":"https://openalex.org/W1564544652","doi":"https://doi.org/10.1007/978-3-540-48302-1_13","title":"DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems","display_name":"DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems","publication_year":1999,"publication_date":"1999-01-01","ids":{"openalex":"https://openalex.org/W1564544652","doi":"https://doi.org/10.1007/978-3-540-48302-1_13","mag":"1564544652"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-48302-1_13","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-48302-1_13","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075098623","display_name":"Milan Vasilko","orcid":null},"institutions":[{"id":"https://openalex.org/I9300472","display_name":"Bournemouth University","ror":"https://ror.org/05wwcw481","country_code":"GB","type":"education","lineage":["https://openalex.org/I9300472"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Milan Vasilko","raw_affiliation_strings":["Microelectronic Systems Research Group, School of DEC, Bournemouth University, Talbot Campus, Fern Barrow, Poole, Dorset, BH12 5BB, UK"],"affiliations":[{"raw_affiliation_string":"Microelectronic Systems Research Group, School of DEC, Bournemouth University, Talbot Campus, Fern Barrow, Poole, Dorset, BH12 5BB, UK","institution_ids":["https://openalex.org/I9300472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5075098623"],"corresponding_institution_ids":["https://openalex.org/I9300472"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":3.4614,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.92361927,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"124","last_page":"133"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.865558385848999},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.8228939175605774},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.5563247203826904},{"id":"https://openalex.org/keywords/temporal-logic","display_name":"Temporal logic","score":0.49498528242111206},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43700727820396423},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40226781368255615},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3728329539299011},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.33874762058258057},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2417302131652832},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.18823492527008057}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.865558385848999},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.8228939175605774},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.5563247203826904},{"id":"https://openalex.org/C25016198","wikidata":"https://www.wikidata.org/wiki/Q781833","display_name":"Temporal logic","level":2,"score":0.49498528242111206},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43700727820396423},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40226781368255615},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3728329539299011},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.33874762058258057},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2417302131652832},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.18823492527008057},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-540-48302-1_13","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-48302-1_13","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","score":0.7599999904632568,"display_name":"Sustainable cities and communities"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1526693219","https://openalex.org/W1981646795","https://openalex.org/W2085887317","https://openalex.org/W2097451609","https://openalex.org/W2112757008","https://openalex.org/W2113729567","https://openalex.org/W2114767355","https://openalex.org/W2133301618","https://openalex.org/W2139637699","https://openalex.org/W2140252553","https://openalex.org/W2155742588","https://openalex.org/W2493513412","https://openalex.org/W4230946966","https://openalex.org/W4242492114","https://openalex.org/W4253015113"],"related_works":["https://openalex.org/W2055008360","https://openalex.org/W2135118255","https://openalex.org/W1500063550","https://openalex.org/W215057456","https://openalex.org/W2165891825","https://openalex.org/W2106366463","https://openalex.org/W1535718467","https://openalex.org/W4231092740","https://openalex.org/W2261987718","https://openalex.org/W2983230882"],"abstract_inverted_index":null,"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}