{"id":"https://openalex.org/W754618436","doi":"https://doi.org/10.1007/978-3-319-16214-0_27","title":"Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures","display_name":"Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W754618436","doi":"https://doi.org/10.1007/978-3-319-16214-0_27","mag":"754618436"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-319-16214-0_27","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-319-16214-0_27","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049984593","display_name":"Efstathios Sotiriou-Xanthopoulos","orcid":"https://orcid.org/0000-0001-8323-3747"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Efstathios Sotiriou-Xanthopoulos","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055307805","display_name":"Dionysios Diamantopoulos","orcid":"https://orcid.org/0000-0003-2979-5946"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dionysios Diamantopoulos","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089110665","display_name":"George Economakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Economakos","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Heroon Polytechniou 9, 15780, Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.05827068,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"321","last_page":"330"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9715027809143066},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8683885335922241},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7795348167419434},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.7156398296356201},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5328683853149414},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.48449060320854187},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4668099880218506},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34812211990356445}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9715027809143066},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8683885335922241},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7795348167419434},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.7156398296356201},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5328683853149414},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.48449060320854187},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4668099880218506},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34812211990356445}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-319-16214-0_27","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-319-16214-0_27","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1604677972","https://openalex.org/W2072881389","https://openalex.org/W2079143959","https://openalex.org/W2094998159","https://openalex.org/W2166029537","https://openalex.org/W2482246557"],"related_works":["https://openalex.org/W754618436","https://openalex.org/W1596013603","https://openalex.org/W2271624625","https://openalex.org/W2369655976","https://openalex.org/W1604320855","https://openalex.org/W2185500718","https://openalex.org/W3124648670","https://openalex.org/W3147787617","https://openalex.org/W2369375926","https://openalex.org/W4281757109"],"abstract_inverted_index":null,"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}