{"id":"https://openalex.org/W7130505682","doi":"https://doi.org/10.1007/978-3-032-17174-0_22","title":"Implementing the\u00a0RISC-V Debug Specification on\u00a0an\u00a0Interleaved Multi-Threading Core","display_name":"Implementing the\u00a0RISC-V Debug Specification on\u00a0an\u00a0Interleaved Multi-Threading Core","publication_year":2026,"publication_date":"2026-01-01","ids":{"openalex":"https://openalex.org/W7130505682","doi":"https://doi.org/10.1007/978-3-032-17174-0_22"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-032-17174-0_22","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-032-17174-0_22","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5116772486","display_name":"Andrea Marcelli","orcid":null},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Andrea Marcelli","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017241261","display_name":"Marco Pisani","orcid":"https://orcid.org/0000-0001-6233-5429"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Pisani","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059848419","display_name":"Marco Angioli","orcid":"https://orcid.org/0009-0002-5955-8378"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Angioli","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111556071","display_name":"R.L. Martino","orcid":null},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Rocco Martino","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044942957","display_name":"Antonio Mastrandrea","orcid":"https://orcid.org/0000-0003-4243-1258"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Antonio Mastrandrea","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067054447","display_name":"Mauro Olivieri","orcid":"https://orcid.org/0000-0002-0214-9904"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mauro Olivieri","raw_affiliation_strings":["Sapienza University of Rome, Rome, 00184, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza University of Rome, Rome, 00184, Italy","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5116772486"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.80120482,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"161","last_page":"168"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5924999713897705,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5924999713897705,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.09860000014305115,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.07419999688863754,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.9473000168800354},{"id":"https://openalex.org/keywords/background-debug-mode-interface","display_name":"Background debug mode interface","score":0.7928000092506409},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.6313999891281128},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5892000198364258},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5347999930381775},{"id":"https://openalex.org/keywords/nexus","display_name":"Nexus (standard)","score":0.5267999768257141}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.9473000168800354},{"id":"https://openalex.org/C124774103","wikidata":"https://www.wikidata.org/wiki/Q4839640","display_name":"Background debug mode interface","level":3,"score":0.7928000092506409},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7324000000953674},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6818000078201294},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.6313999891281128},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5892000198364258},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5347999930381775},{"id":"https://openalex.org/C148609458","wikidata":"https://www.wikidata.org/wiki/Q7021281","display_name":"Nexus (standard)","level":2,"score":0.5267999768257141},{"id":"https://openalex.org/C136388014","wikidata":"https://www.wikidata.org/wiki/Q17084976","display_name":"Algorithmic program debugging","level":3,"score":0.38609999418258667},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.38040000200271606},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.365200012922287},{"id":"https://openalex.org/C155911762","wikidata":"https://www.wikidata.org/wiki/Q422321","display_name":"Blueprint","level":2,"score":0.35760000348091125},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29649999737739563},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.29600000381469727},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2721000015735626},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2556999921798706}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-032-17174-0_22","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-032-17174-0_22","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2772471853","https://openalex.org/W2913135501","https://openalex.org/W2963255460","https://openalex.org/W4391892465","https://openalex.org/W4400447853"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-02-20T06:18:38.638704","created_date":"2026-02-19T00:00:00"}