{"id":"https://openalex.org/W4291214040","doi":"https://doi.org/10.1007/978-3-031-15074-6_1","title":"High-Level Synthesis of\u00a0Digital Circuits from\u00a0Template Haskell and\u00a0SDF-AP","display_name":"High-Level Synthesis of\u00a0Digital Circuits from\u00a0Template Haskell and\u00a0SDF-AP","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4291214040","doi":"https://doi.org/10.1007/978-3-031-15074-6_1"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-031-15074-6_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-031-15074-6_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://research.utwente.nl/en/publications/93524663-a257-438d-843e-4c474a37ec85","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083527723","display_name":"Hendrik Folmer","orcid":"https://orcid.org/0000-0003-3928-1658"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"H. H. Folmer","raw_affiliation_strings":["CAES: Computer Architectures for Embedded Systems, University of Twente, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"CAES: Computer Architectures for Embedded Systems, University of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030258278","display_name":"Robert de Groote","orcid":null},"institutions":[{"id":"https://openalex.org/I2801398864","display_name":"Saxion University of Applied Sciences","ror":"https://ror.org/005t9n460","country_code":"NL","type":"education","lineage":["https://openalex.org/I2801398864"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"R. de Groote","raw_affiliation_strings":["Saxion Hogeschool, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"Saxion Hogeschool, Enschede, Netherlands","institution_ids":["https://openalex.org/I2801398864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111443523","display_name":"Marco J.G. Bekooij","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"M. J. G. Bekooij","raw_affiliation_strings":["CAES: Computer Architectures for Embedded Systems, University of Twente, Enschede, Netherlands"],"affiliations":[{"raw_affiliation_string":"CAES: Computer Architectures for Embedded Systems, University of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5083527723"],"corresponding_institution_ids":["https://openalex.org/I94624287"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.6548,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.91100478,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"3","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/haskell","display_name":"Haskell","score":0.8445465564727783},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.8350058794021606},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.828964352607727},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.7884094715118408},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6813784241676331},{"id":"https://openalex.org/keywords/functional-programming","display_name":"Functional programming","score":0.5379844903945923},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.500800609588623},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4919845759868622},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44202157855033875},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.42665353417396545},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4168534576892853},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3139330744743347},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.26575785875320435}],"concepts":[{"id":"https://openalex.org/C2780624054","wikidata":"https://www.wikidata.org/wiki/Q34010","display_name":"Haskell","level":3,"score":0.8445465564727783},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.8350058794021606},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.828964352607727},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.7884094715118408},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6813784241676331},{"id":"https://openalex.org/C42383842","wikidata":"https://www.wikidata.org/wiki/Q193076","display_name":"Functional programming","level":2,"score":0.5379844903945923},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.500800609588623},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4919845759868622},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44202157855033875},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.42665353417396545},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4168534576892853},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3139330744743347},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.26575785875320435}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/978-3-031-15074-6_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-031-15074-6_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:ris.utwente.nl:openaire/93524663-a257-438d-843e-4c474a37ec85","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/93524663-a257-438d-843e-4c474a37ec85","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Folmer, H H, de Groote, R & Bekooij, M J G 2022, High-Level Synthesis of\u00a0Digital Circuits from\u00a0Template Haskell and\u00a0SDF-AP. in A Orailoglu, M Reichenbach & M Jung (eds), Embedded Computer Systems : Architectures, Modeling, and Simulation - 22nd International Conference, SAMOS 2022, Proceedings. Lecture Notes in Computer Science, vol. 13511, Springer, Cham, pp. 3-27, 22nd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2022, Samos, Greece, 3/07/22. https://doi.org/10.1007/978-3-031-15074-6_1","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:arXiv.org:2504.07585","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2504.07585","pdf_url":"https://arxiv.org/pdf/2504.07585","source":{"id":"https://openalex.org/S4393918464","display_name":"ArXiv.org","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:ris.utwente.nl:openaire/93524663-a257-438d-843e-4c474a37ec85","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/93524663-a257-438d-843e-4c474a37ec85","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Folmer, H H, de Groote, R & Bekooij, M J G 2022, High-Level Synthesis of\u00a0Digital Circuits from\u00a0Template Haskell and\u00a0SDF-AP. in A Orailoglu, M Reichenbach & M Jung (eds), Embedded Computer Systems : Architectures, Modeling, and Simulation - 22nd International Conference, SAMOS 2022, Proceedings. Lecture Notes in Computer Science, vol. 13511, Springer, Cham, pp. 3-27, 22nd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2022, Samos, Greece, 3/07/22. https://doi.org/10.1007/978-3-031-15074-6_1","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.6200000047683716,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W2009775190","https://openalex.org/W2020841721","https://openalex.org/W2039866288","https://openalex.org/W2055084740","https://openalex.org/W2091158003","https://openalex.org/W2098394034","https://openalex.org/W2123407602","https://openalex.org/W2131023841","https://openalex.org/W2132457452","https://openalex.org/W2142012722","https://openalex.org/W2143315168","https://openalex.org/W2143570521","https://openalex.org/W2147088458","https://openalex.org/W2150593711","https://openalex.org/W2155256384","https://openalex.org/W2160323811","https://openalex.org/W2160846021","https://openalex.org/W2166029537","https://openalex.org/W2169180789","https://openalex.org/W2170617144","https://openalex.org/W2295152465","https://openalex.org/W2798273149","https://openalex.org/W2800690434","https://openalex.org/W2914867373","https://openalex.org/W2975468520","https://openalex.org/W3007652338","https://openalex.org/W3147403077","https://openalex.org/W4255425514"],"related_works":["https://openalex.org/W4251805752","https://openalex.org/W2156965212","https://openalex.org/W4321639070","https://openalex.org/W4233602124","https://openalex.org/W2160323811","https://openalex.org/W2120819183","https://openalex.org/W2037249531","https://openalex.org/W2139787869","https://openalex.org/W4291214040","https://openalex.org/W2100858214"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":3}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}