{"id":"https://openalex.org/W3045058755","doi":"https://doi.org/10.1007/978-3-030-53273-4_2","title":"On Test Generation for Microprocessors for Extended Class of Functional Faults","display_name":"On Test Generation for Microprocessors for Extended Class of Functional Faults","publication_year":2020,"publication_date":"2020-01-01","ids":{"openalex":"https://openalex.org/W3045058755","doi":"https://doi.org/10.1007/978-3-030-53273-4_2","mag":"3045058755"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-030-53273-4_2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-030-53273-4_2","pdf_url":null,"source":{"id":"https://openalex.org/S4210185096","display_name":"IFIP advances in information and communication technology","issn_l":"1868-422X","issn":["1868-422X","1868-4238"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IFIP Advances in Information and Communication Technology","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://inria.hal.science/hal-03476617","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065172476","display_name":"Adeboye Stephen Oyeniran","orcid":"https://orcid.org/0000-0002-6344-3875"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":true,"raw_author_name":"Adeboye Stephen Oyeniran","raw_affiliation_strings":["Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010536057","display_name":"Raimund Ubar","orcid":"https://orcid.org/0000-0001-8186-4385"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Raimund Ubar","raw_affiliation_strings":["Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059391257","display_name":"Maksim Jenihhin","orcid":"https://orcid.org/0000-0001-8165-9592"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Maksim Jenihhin","raw_affiliation_strings":["Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010286547","display_name":"Jaan Raik","orcid":"https://orcid.org/0000-0001-8113-020X"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Jaan Raik","raw_affiliation_strings":["Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre for Dependable Computing Systems, Department of Computer Systems, Tallinn University of Technology, Akadeemia 15a, 12618, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5065172476"],"corresponding_institution_ids":["https://openalex.org/I111112146"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"21","last_page":"44"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7005230188369751},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6825982928276062},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.6263011693954468},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6257936954498291},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.5046690702438354},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.48871707916259766},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.48584267497062683},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.46858638525009155},{"id":"https://openalex.org/keywords/fault-model","display_name":"Fault model","score":0.4387875497341156},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.436000257730484},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3936504125595093},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.3679267466068268},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34813204407691956},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27739498019218445},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2690145671367645},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18880802392959595},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15805819630622864},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1234143078327179}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7005230188369751},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6825982928276062},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.6263011693954468},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6257936954498291},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.5046690702438354},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.48871707916259766},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.48584267497062683},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.46858638525009155},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.4387875497341156},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.436000257730484},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3936504125595093},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.3679267466068268},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34813204407691956},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27739498019218445},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2690145671367645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18880802392959595},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15805819630622864},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1234143078327179},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/978-3-030-53273-4_2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-030-53273-4_2","pdf_url":null,"source":{"id":"https://openalex.org/S4210185096","display_name":"IFIP advances in information and communication technology","issn_l":"1868-422X","issn":["1868-422X","1868-4238"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IFIP Advances in Information and Communication Technology","raw_type":"book-chapter"},{"id":"pmh:oai:HAL:hal-03476617v1","is_oa":true,"landing_page_url":"https://inria.hal.science/hal-03476617","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"27th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.21-44, ⟨10.1007/978-3-030-53273-4_2⟩","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-03476617v1","is_oa":true,"landing_page_url":"https://inria.hal.science/hal-03476617","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"27th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.21-44, ⟨10.1007/978-3-030-53273-4_2⟩","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.550000011920929}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W580566346","https://openalex.org/W1583437159","https://openalex.org/W1891950198","https://openalex.org/W1927443640","https://openalex.org/W1965015817","https://openalex.org/W1993225874","https://openalex.org/W1995827686","https://openalex.org/W2008990681","https://openalex.org/W2011494794","https://openalex.org/W2011745694","https://openalex.org/W2031313028","https://openalex.org/W2033613342","https://openalex.org/W2061104937","https://openalex.org/W2071841318","https://openalex.org/W2082836981","https://openalex.org/W2103363686","https://openalex.org/W2105522986","https://openalex.org/W2106864957","https://openalex.org/W2111785162","https://openalex.org/W2115386046","https://openalex.org/W2115795793","https://openalex.org/W2126042558","https://openalex.org/W2127299204","https://openalex.org/W2127346720","https://openalex.org/W2130231461","https://openalex.org/W2152640154","https://openalex.org/W2154237597","https://openalex.org/W2155341425","https://openalex.org/W2156710719","https://openalex.org/W2162696040","https://openalex.org/W2170296906","https://openalex.org/W2334801967","https://openalex.org/W2407819792","https://openalex.org/W2499061244","https://openalex.org/W2800011419","https://openalex.org/W2991906641","https://openalex.org/W4210836009","https://openalex.org/W4242469033","https://openalex.org/W4243513274","https://openalex.org/W6629845848"],"related_works":["https://openalex.org/W4256030018","https://openalex.org/W2147400189","https://openalex.org/W2021253405","https://openalex.org/W2568949342","https://openalex.org/W2340957901","https://openalex.org/W2535245920","https://openalex.org/W1555400249","https://openalex.org/W2031110496","https://openalex.org/W2157154381","https://openalex.org/W3147038789"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}