{"id":"https://openalex.org/W3000153348","doi":"https://doi.org/10.1007/978-3-030-38295-7","title":"Logic Synthesis for FPGA-Based Control Units: Structural Decomposition in Logic Design","display_name":"Logic Synthesis for FPGA-Based Control Units: Structural Decomposition in Logic Design","publication_year":2020,"publication_date":"2020-01-08","ids":{"openalex":"https://openalex.org/W3000153348","doi":"https://doi.org/10.1007/978-3-030-38295-7","mag":"3000153348"},"language":"en","primary_location":{"id":"pmh:oai:aleph.bib-bvb.de:BVB01-031815993","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-030-38295-7","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"software, multimedia"},"type":"book","indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114017949","display_name":"Alexander Barkalov","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Alexander Barkalov","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079123162","display_name":"Larysa Titarenko","orcid":"https://orcid.org/0000-0001-9558-3322"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Larysa Titarenko","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0001-9558-3322","affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043659905","display_name":"Kamil Mielcarek","orcid":"https://orcid.org/0000-0003-4027-7541"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kamil Mielcarek","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0003-4027-7541","affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5085989076","display_name":"S\u0142awomir Chmielewski","orcid":"https://orcid.org/0000-0001-9671-2800"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Chmielewski","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0001-9671-2800","affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.1784,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.89189189,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9861999750137329,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9861999750137329,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9695000052452087,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9614999890327454,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.6492613554000854},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.6166427731513977},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5750077962875366},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5162620544433594},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.5158038139343262},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.5038427710533142},{"id":"https://openalex.org/keywords/decomposition","display_name":"Decomposition","score":0.42711877822875977},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.4237644672393799},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.42324453592300415},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4221470355987549},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.33452108502388},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28452688455581665},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.25066906213760376},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.09998035430908203}],"concepts":[{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.6492613554000854},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.6166427731513977},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5750077962875366},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5162620544433594},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.5158038139343262},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.5038427710533142},{"id":"https://openalex.org/C124681953","wikidata":"https://www.wikidata.org/wiki/Q339062","display_name":"Decomposition","level":2,"score":0.42711877822875977},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.4237644672393799},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.42324453592300415},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4221470355987549},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.33452108502388},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28452688455581665},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.25066906213760376},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.09998035430908203},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"pmh:oai:aleph.bib-bvb.de:BVB01-031815993","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-030-38295-7","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"software, multimedia"},{"id":"pmh:oai:cds.cern.ch:2756667","is_oa":false,"landing_page_url":"http://cds.cern.ch/record/2756667","pdf_url":null,"source":{"id":"https://openalex.org/S4306402194","display_name":"CERN Document Server (European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":null},{"id":"mag:3000153348","is_oa":false,"landing_page_url":"https://link.springer.com/content/pdf/10.1007/978-3-030-38295-7.pdf","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2077400643","https://openalex.org/W2150390298","https://openalex.org/W2166326988","https://openalex.org/W2005446869","https://openalex.org/W2143784182","https://openalex.org/W3150769492","https://openalex.org/W1988371585","https://openalex.org/W2161114343","https://openalex.org/W2136849932","https://openalex.org/W2146816656","https://openalex.org/W2138447154","https://openalex.org/W2152547303","https://openalex.org/W1977514468","https://openalex.org/W1995215165","https://openalex.org/W1617095720","https://openalex.org/W1979269278","https://openalex.org/W2139206565","https://openalex.org/W2078362711","https://openalex.org/W79431907","https://openalex.org/W2197466303"],"abstract_inverted_index":null,"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}