{"id":"https://openalex.org/W121640275","doi":"https://doi.org/10.1007/978-1-4419-6400-7_6","title":"MRICDF: A Polychronous Model for Embedded Software Synthesis","display_name":"MRICDF: A Polychronous Model for Embedded Software Synthesis","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W121640275","doi":"https://doi.org/10.1007/978-1-4419-6400-7_6","mag":"121640275"},"language":"en","primary_location":{"id":"doi:10.1007/978-1-4419-6400-7_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-1-4419-6400-7_6","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Synthesis of Embedded Software","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043317855","display_name":"Bijoy A. Jose","orcid":"https://orcid.org/0000-0002-9541-4286"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Bijoy A. Jose","raw_affiliation_strings":["FERMAT Lab, Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"FERMAT Lab, Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021517996","display_name":"Sandeep K. Shukla","orcid":"https://orcid.org/0000-0001-5525-7426"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sandeep K. Shukla","raw_affiliation_strings":["Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Whittemore Hall 302, Blacksburg, 24061, USA","FERMAT Lab, Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Whittemore Hall 302, Blacksburg, 24061, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"FERMAT Lab, Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5043317855"],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":2.5991,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.87314017,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"173","last_page":"199"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8256821036338806},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.6488240957260132},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5860914587974548},{"id":"https://openalex.org/keywords/programmer","display_name":"Programmer","score":0.5167793035507202},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42655253410339355},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36496609449386597},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.36473339796066284},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.32462334632873535}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8256821036338806},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.6488240957260132},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5860914587974548},{"id":"https://openalex.org/C2778514511","wikidata":"https://www.wikidata.org/wiki/Q1374194","display_name":"Programmer","level":2,"score":0.5167793035507202},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42655253410339355},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36496609449386597},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.36473339796066284},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.32462334632873535}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-1-4419-6400-7_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-1-4419-6400-7_6","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Synthesis of Embedded Software","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1498304098","https://openalex.org/W1535515756","https://openalex.org/W1590647512","https://openalex.org/W1817199704","https://openalex.org/W1875492031","https://openalex.org/W1963984425","https://openalex.org/W2002032317","https://openalex.org/W2035115145","https://openalex.org/W2045010483","https://openalex.org/W2051973459","https://openalex.org/W2077498440","https://openalex.org/W2081938726","https://openalex.org/W2100500718","https://openalex.org/W2119355229","https://openalex.org/W2125415493","https://openalex.org/W2127335869","https://openalex.org/W2145331516","https://openalex.org/W2167258402","https://openalex.org/W2912169573","https://openalex.org/W3146645817","https://openalex.org/W4206455946","https://openalex.org/W4251457929"],"related_works":["https://openalex.org/W3137189469","https://openalex.org/W2382358600","https://openalex.org/W1985198438","https://openalex.org/W3160136729","https://openalex.org/W2021040988","https://openalex.org/W4246531319","https://openalex.org/W1982047081","https://openalex.org/W4254993069","https://openalex.org/W2475423329","https://openalex.org/W4238823939"],"abstract_inverted_index":null,"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}