{"id":"https://openalex.org/W1588229312","doi":"https://doi.org/10.1007/978-0-387-73661-7_4","title":"Defragmentation Algorithms for Partially Reconfigurable Hardware","display_name":"Defragmentation Algorithms for Partially Reconfigurable Hardware","publication_year":2007,"publication_date":"2007-09-11","ids":{"openalex":"https://openalex.org/W1588229312","doi":"https://doi.org/10.1007/978-0-387-73661-7_4","mag":"1588229312"},"language":"en","primary_location":{"id":"doi:10.1007/978-0-387-73661-7_4","is_oa":true,"landing_page_url":"https://doi.org/10.1007/978-0-387-73661-7_4","pdf_url":"https://link.springer.com/content/pdf/10.1007/978-0-387-73661-7_4.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IFIP International Federation for Information Proc","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://link.springer.com/content/pdf/10.1007/978-0-387-73661-7_4.pdf","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041162707","display_name":"Markus Koester","orcid":null},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Markus Koester","raw_affiliation_strings":["Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030056981","display_name":"Heiko Kalte","orcid":null},"institutions":[{"id":"https://openalex.org/I177877127","display_name":"University of Western Australia","ror":"https://ror.org/047272k79","country_code":"AU","type":"education","lineage":["https://openalex.org/I177877127"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Heiko Kalte","raw_affiliation_strings":["School of Computer Science and Software Engineering, University of Western Australia, Australia"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Software Engineering, University of Western Australia, Australia","institution_ids":["https://openalex.org/I177877127"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028498307","display_name":"Mario Porrmann","orcid":"https://orcid.org/0000-0003-1005-5753"},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mario Porrmann","raw_affiliation_strings":["Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043372144","display_name":"Ulrich R\u00fcckert","orcid":null},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulrich R\u00fcckert","raw_affiliation_strings":["Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Heinz Nixdorf Institute, System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5041162707"],"corresponding_institution_ids":["https://openalex.org/I206945453"],"apc_list":null,"apc_paid":null,"fwci":2.4954,"has_fulltext":true,"cited_by_count":9,"citation_normalized_percentile":{"value":0.88847584,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"41","last_page":"53"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12784","display_name":"Modular Robots and Swarm Intelligence","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8707507848739624},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8375717997550964},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7619460821151733},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6927962303161621},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.6111467480659485},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5781567692756653},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5447233319282532},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.4381408989429474},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.42710989713668823},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37445199489593506},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.33427953720092773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11821809411048889}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8707507848739624},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8375717997550964},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7619460821151733},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6927962303161621},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.6111467480659485},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5781567692756653},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5447233319282532},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.4381408989429474},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.42710989713668823},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37445199489593506},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.33427953720092773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11821809411048889},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-0-387-73661-7_4","is_oa":true,"landing_page_url":"https://doi.org/10.1007/978-0-387-73661-7_4","pdf_url":"https://link.springer.com/content/pdf/10.1007/978-0-387-73661-7_4.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IFIP International Federation for Information Proc","raw_type":"book-chapter"}],"best_oa_location":{"id":"doi:10.1007/978-0-387-73661-7_4","is_oa":true,"landing_page_url":"https://doi.org/10.1007/978-0-387-73661-7_4","pdf_url":"https://link.springer.com/content/pdf/10.1007/978-0-387-73661-7_4.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IFIP International Federation for Information Proc","raw_type":"book-chapter"},"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.5400000214576721}],"awards":[{"id":"https://openalex.org/G6052429835","display_name":null,"funder_award_id":"(DFG)","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G8526424774","display_name":null,"funder_award_id":"Fellowship","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"},{"id":"https://openalex.org/F4320324816","display_name":"Universit\u00e4t Paderborn","ror":"https://ror.org/058kzsd48"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1588229312.pdf","grobid_xml":"https://content.openalex.org/works/W1588229312.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W102718729","https://openalex.org/W1500027436","https://openalex.org/W1516418247","https://openalex.org/W1543921836","https://openalex.org/W1559962279","https://openalex.org/W1792849551","https://openalex.org/W2079543149","https://openalex.org/W2106767353","https://openalex.org/W2109445893","https://openalex.org/W2149052212","https://openalex.org/W2912450397","https://openalex.org/W6630159774","https://openalex.org/W6630925850","https://openalex.org/W6632632525"],"related_works":["https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2096938998","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540","https://openalex.org/W2204754129","https://openalex.org/W1569711686"],"abstract_inverted_index":{"Dynamic":[0],"reconfiguration":[1,18],"is":[2,49,59,76],"a":[3,60,77,91,102,142,147],"promising":[4],"approach":[5,121],"for":[6,15,104],"resource":[7,47],"efficient":[8],"utilization":[9,39],"of":[10,55,70,79,112,115,126,136,141],"microelectronic":[11],"systems.":[12,44,73],"Standard":[13],"platforms":[14],"partial":[16],"dynamic":[17],"are":[19],"field-programmable":[20],"gate":[21],"arrays":[22],"(FPGAs).":[23],"Multiple":[24],"hardware":[25,85],"tasks":[26,86],"can":[27],"share":[28],"the":[29,37,53,67,95,116,124,139,157],"same":[30],"FPGA":[31],"resources":[32],"over":[33],"time,":[34],"which":[35],"increases":[36],"device":[38],"in":[40,52],"comparison":[41],"to":[42,62,66,83],"non-reconfigurable":[43],"Although,":[45],"similar":[46],"management":[48],"already":[50],"known":[51],"area":[54],"operating":[56],"systems,":[57],"there":[58,75],"requirement":[61],"adapt":[63],"these":[64],"concepts":[65],"special":[68],"needs":[69],"dynamically":[71],"reconfigurable":[72],"Additionally,":[74],"lack":[78],"underlying":[80],"mechanisms,":[81],"e.g.,":[82],"suspend":[84],"and":[87,110,146,155],"restart":[88],"them":[89],"at":[90],"different":[92,134,158],"position":[93],"within":[94],"FPGA.":[96],"In":[97],"this":[98,120],"article":[99],"we":[100,122,149],"introduce":[101],"mechanism":[103],"task":[105],"relocation":[106],"that":[107,132],"includes":[108],"saving":[109],"restoring":[111],"state":[113],"information":[114],"task.":[117],"Based":[118],"on":[119],"address":[123],"problem":[125],"defragmentation.":[127],"We":[128],"present":[129],"defragmentation":[130],"algorithms":[131],"minimize":[133],"types":[135],"costs.":[137],"With":[138],"help":[140],"detailed":[143],"simulation":[144,153],"model":[145],"benchmark,":[148],"finally":[150],"provide":[151],"realistic":[152],"results":[154],"compare":[156],"algorithms.":[159]},"counts_by_year":[{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}