{"id":"https://openalex.org/W1584219532","doi":"https://doi.org/10.1007/3-540-61730-2_30","title":"CCSimP \u2014 An instruction-level costum-configurable processor for FPLDs","display_name":"CCSimP \u2014 An instruction-level costum-configurable processor for FPLDs","publication_year":1996,"publication_date":"1996-01-01","ids":{"openalex":"https://openalex.org/W1584219532","doi":"https://doi.org/10.1007/3-540-61730-2_30","mag":"1584219532"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-61730-2_30","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-61730-2_30","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088166627","display_name":"Zoran Sal\u010di\u0107","orcid":"https://orcid.org/0000-0001-7714-9848"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":true,"raw_author_name":"Zoran Salcic","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Auckland University, 20 Symonds St., Auckland, New Zealand","Auckland University#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Auckland University, 20 Symonds St., Auckland, New Zealand","institution_ids":["https://openalex.org/I154130895"]},{"raw_affiliation_string":"Auckland University#TAB#","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078367551","display_name":"Bruce Maunder","orcid":null},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Bruce Maunder","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Auckland University, 20 Symonds St., Auckland, New Zealand","Auckland University#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Auckland University, 20 Symonds St., Auckland, New Zealand","institution_ids":["https://openalex.org/I154130895"]},{"raw_affiliation_string":"Auckland University#TAB#","institution_ids":["https://openalex.org/I154130895"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088166627"],"corresponding_institution_ids":["https://openalex.org/I154130895"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.4943,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.88414634,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"280","last_page":"289"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9161469340324402},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8827333450317383},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.5862064361572266},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5510405898094177},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5288689732551575},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.515184760093689},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5150463581085205},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5046950578689575},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.47743043303489685},{"id":"https://openalex.org/keywords/application-specific-instruction-set-processor","display_name":"Application-specific instruction-set processor","score":0.44692039489746094},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3388892412185669},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2416723370552063},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.18960195779800415}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9161469340324402},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8827333450317383},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.5862064361572266},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5510405898094177},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5288689732551575},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.515184760093689},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5150463581085205},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5046950578689575},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.47743043303489685},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.44692039489746094},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3388892412185669},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2416723370552063},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.18960195779800415}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-61730-2_30","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-61730-2_30","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1559057691","https://openalex.org/W1917754378","https://openalex.org/W2109218940","https://openalex.org/W2117225843","https://openalex.org/W2133078064","https://openalex.org/W2146343039","https://openalex.org/W2169601811"],"related_works":["https://openalex.org/W2162921448","https://openalex.org/W2019183874","https://openalex.org/W2036206036","https://openalex.org/W3002622661","https://openalex.org/W2139112224","https://openalex.org/W2129565950","https://openalex.org/W37150954","https://openalex.org/W4367172762","https://openalex.org/W2125485192","https://openalex.org/W2551798393"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}