{"id":"https://openalex.org/W1543698845","doi":"https://doi.org/10.1007/3-540-58419-6_111","title":"A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA","display_name":"A Design Environment with Emulation of Prototypes for hardware/software systems using XILINX FPGA","publication_year":1994,"publication_date":"1994-01-01","ids":{"openalex":"https://openalex.org/W1543698845","doi":"https://doi.org/10.1007/3-540-58419-6_111","mag":"1543698845"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-58419-6_111","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-58419-6_111","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084513613","display_name":"Gerd vom B\u00f6gel","orcid":"https://orcid.org/0000-0003-2564-0090"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gerd B\u00f6gel","raw_affiliation_strings":["IMS Duisburg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMS Duisburg","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018628732","display_name":"Petra Nauber","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100127","display_name":"Fraunhofer Institute for Microelectronic Circuits and Systems","ror":"https://ror.org/01243c877","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210100127","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Petra Nauber","raw_affiliation_strings":["Fraunhofer-Institute of Microelectronic Circuits and Systems, IMS Dresden, Grenzstrasse 28, D-01109, Dresden, Germany","IMS Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer-Institute of Microelectronic Circuits and Systems, IMS Dresden, Grenzstrasse 28, D-01109, Dresden, Germany","institution_ids":["https://openalex.org/I4210100127"]},{"raw_affiliation_string":"IMS Dresden","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448134","display_name":"J\u00f6rg Winkler","orcid":"https://orcid.org/0000-0003-1979-8553"},"institutions":[{"id":"https://openalex.org/I4210100127","display_name":"Fraunhofer Institute for Microelectronic Circuits and Systems","ror":"https://ror.org/01243c877","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210100127","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J\u00f6rg Winkler","raw_affiliation_strings":["Fraunhofer-Institute of Microelectronic Circuits and Systems, IMS Dresden, Grenzstrasse 28, D-01109, Dresden, Germany","IMS Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer-Institute of Microelectronic Circuits and Systems, IMS Dresden, Grenzstrasse 28, D-01109, Dresden, Germany","institution_ids":["https://openalex.org/I4210100127"]},{"raw_affiliation_string":"IMS Dresden","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.2902,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.85347432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"315","last_page":"317"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9763000011444092,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9695000052452087,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.9466511011123657},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.810577929019928},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7809587717056274},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6991288661956787},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.6928161382675171},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6493371725082397},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.5885356068611145},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5226854085922241},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.48325115442276},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4581017792224884},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.42165929079055786},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.189258873462677}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.9466511011123657},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.810577929019928},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7809587717056274},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6991288661956787},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.6928161382675171},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6493371725082397},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.5885356068611145},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5226854085922241},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.48325115442276},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4581017792224884},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.42165929079055786},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.189258873462677},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/3-540-58419-6_111","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-58419-6_111","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:fraunhofer.de:PX-9300","is_oa":false,"landing_page_url":"http://publica.fraunhofer.de/documents/PX-9300.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400801","display_name":"Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer IMS","raw_type":"Conference Paper"},{"id":"pmh:oai:publica.fraunhofer.de:publica/322359","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/322359","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2888526229","https://openalex.org/W119599369","https://openalex.org/W4200391368","https://openalex.org/W2113648965","https://openalex.org/W2155484023","https://openalex.org/W2388221044","https://openalex.org/W2619213283","https://openalex.org/W2984236338","https://openalex.org/W3117064361","https://openalex.org/W2057745131"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}
