{"id":"https://openalex.org/W1466979986","doi":"https://doi.org/10.1007/3-540-57091-8_25","title":"Technologies and utilization of Field Programmable Gate Arrays","display_name":"Technologies and utilization of Field Programmable Gate Arrays","publication_year":1993,"publication_date":"1993-01-01","ids":{"openalex":"https://openalex.org/W1466979986","doi":"https://doi.org/10.1007/3-540-57091-8_25","mag":"1466979986"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-57091-8_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-57091-8_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055846108","display_name":"Jouni Isoaho","orcid":"https://orcid.org/0000-0002-5789-3992"},"institutions":[{"id":"https://openalex.org/I150589677","display_name":"Tampere University of Applied Sciences","ror":"https://ror.org/00bwtjf83","country_code":"FI","type":"education","lineage":["https://openalex.org/I150589677"]},{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"Jouni Isoaho","raw_affiliation_strings":["Signal Processing Laboratory, Tampere University of Technology, P.O.Box 553, SF-33101, Tampere, Finland","[Tampere Univ. of Tech.]"],"affiliations":[{"raw_affiliation_string":"Signal Processing Laboratory, Tampere University of Technology, P.O.Box 553, SF-33101, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]},{"raw_affiliation_string":"[Tampere Univ. of Tech.]","institution_ids":["https://openalex.org/I150589677"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076427757","display_name":"A. Nummela","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]},{"id":"https://openalex.org/I150589677","display_name":"Tampere University of Applied Sciences","ror":"https://ror.org/00bwtjf83","country_code":"FI","type":"education","lineage":["https://openalex.org/I150589677"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Arto Nummela","raw_affiliation_strings":["Signal Processing Laboratory, Tampere University of Technology, P.O.Box 553, SF-33101, Tampere, Finland","[Tampere Univ. of Tech.]"],"affiliations":[{"raw_affiliation_string":"Signal Processing Laboratory, Tampere University of Technology, P.O.Box 553, SF-33101, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]},{"raw_affiliation_string":"[Tampere Univ. of Tech.]","institution_ids":["https://openalex.org/I150589677"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003371230","display_name":"Hannu Tenhunen","orcid":"https://orcid.org/0000-0003-1959-6513"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Hannu Tenhunen","raw_affiliation_strings":["The Royal Institute of Technology, Institute of Electronic System Design, S-10044, Stockholm, Sweden","The Royal Institute of Technology, Institute of Electronic System Design"],"affiliations":[{"raw_affiliation_string":"The Royal Institute of Technology, Institute of Electronic System Design, S-10044, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"The Royal Institute of Technology, Institute of Electronic System Design","institution_ids":["https://openalex.org/I86987016"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5055846108"],"corresponding_institution_ids":["https://openalex.org/I150589677","https://openalex.org/I4210133110"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.5209,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.66853933,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"11","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8589079976081848},{"id":"https://openalex.org/keywords/programmable-array-logic","display_name":"Programmable Array Logic","score":0.857414960861206},{"id":"https://openalex.org/keywords/erasable-programmable-logic-device","display_name":"Erasable programmable logic device","score":0.7252132892608643},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.715972363948822},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.7095626592636108},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.688859760761261},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.6552282571792603},{"id":"https://openalex.org/keywords/macrocell-array","display_name":"Macrocell array","score":0.6091036796569824},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5576429963111877},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49321597814559937},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48548534512519836},{"id":"https://openalex.org/keywords/emphasis","display_name":"Emphasis (telecommunications)","score":0.4745241701602936},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4478614032268524},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4443846344947815},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.422513484954834},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4169086217880249},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3807227611541748},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2839469909667969},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.2180856466293335},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17155671119689941},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12338045239448547}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8589079976081848},{"id":"https://openalex.org/C113323844","wikidata":"https://www.wikidata.org/wiki/Q1378651","display_name":"Programmable Array Logic","level":5,"score":0.857414960861206},{"id":"https://openalex.org/C110050671","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Erasable programmable logic device","level":5,"score":0.7252132892608643},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.715972363948822},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.7095626592636108},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.688859760761261},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.6552282571792603},{"id":"https://openalex.org/C142278197","wikidata":"https://www.wikidata.org/wiki/Q4284934","display_name":"Macrocell array","level":5,"score":0.6091036796569824},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5576429963111877},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49321597814559937},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48548534512519836},{"id":"https://openalex.org/C177454536","wikidata":"https://www.wikidata.org/wiki/Q578290","display_name":"Emphasis (telecommunications)","level":2,"score":0.4745241701602936},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4478614032268524},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4443846344947815},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.422513484954834},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4169086217880249},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3807227611541748},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2839469909667969},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.2180856466293335},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17155671119689941},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12338045239448547},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-57091-8_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-57091-8_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W126360885","https://openalex.org/W256785779","https://openalex.org/W590201237","https://openalex.org/W1735031787","https://openalex.org/W1825256380","https://openalex.org/W2005479963","https://openalex.org/W2007173547","https://openalex.org/W2108150129","https://openalex.org/W2128324504","https://openalex.org/W2131722625","https://openalex.org/W2143007938","https://openalex.org/W2294887632","https://openalex.org/W4295679857","https://openalex.org/W6679560873"],"related_works":["https://openalex.org/W1528933814","https://openalex.org/W3013792460","https://openalex.org/W3117015220","https://openalex.org/W1904803855","https://openalex.org/W3022525969","https://openalex.org/W2376859467","https://openalex.org/W2466591189","https://openalex.org/W4389045693","https://openalex.org/W2054740893","https://openalex.org/W2764789987"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}