{"id":"https://openalex.org/W1541092693","doi":"https://doi.org/10.1007/3-540-49519-3_15","title":"A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool","display_name":"A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W1541092693","doi":"https://doi.org/10.1007/3-540-49519-3_15","mag":"1541092693"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-49519-3_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-49519-3_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112153184","display_name":"Nazanin Mansouri","orcid":null},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nazanin Mansouri","raw_affiliation_strings":["Digital Design Environments Laboratory ECECS Department, University of Cincinnati, Cincinnati, Ohio, 45221-0030, USA","University of Cincinnati"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Design Environments Laboratory ECECS Department, University of Cincinnati, Cincinnati, Ohio, 45221-0030, USA","institution_ids":["https://openalex.org/I63135867"]},{"raw_affiliation_string":"University of Cincinnati","institution_ids":["https://openalex.org/I63135867"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040975645","display_name":"Ranga Vemuri","orcid":"https://orcid.org/0000-0002-4903-2746"},"institutions":[{"id":"https://openalex.org/I63135867","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079","country_code":"US","type":"education","lineage":["https://openalex.org/I63135867"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ranga Vemuri","raw_affiliation_strings":["Digital Design Environments Laboratory ECECS Department, University of Cincinnati, Cincinnati, Ohio, 45221-0030, USA","University of Cincinnati"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Design Environments Laboratory ECECS Department, University of Cincinnati, Cincinnati, Ohio, 45221-0030, USA","institution_ids":["https://openalex.org/I63135867"]},{"raw_affiliation_string":"University of Cincinnati","institution_ids":["https://openalex.org/I63135867"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I63135867"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":1.153,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.76397516,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"204","last_page":"221"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8313789963722229},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.7633541822433472},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6999823451042175},{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.6401572823524475},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5628885626792908},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5543830394744873},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4905511736869812},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.44194090366363525},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.42974695563316345},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3617037534713745},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34400105476379395},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2569197416305542},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.16557830572128296},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.11824947595596313},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.09305873513221741}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8313789963722229},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7633541822433472},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6999823451042175},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.6401572823524475},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5628885626792908},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5543830394744873},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4905511736869812},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.44194090366363525},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.42974695563316345},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3617037534713745},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34400105476379395},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2569197416305542},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.16557830572128296},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.11824947595596313},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.09305873513221741},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/3-540-49519-3_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-49519-3_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.57.8636","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.57.8636","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.uc.edu/~ddel/publications/mansouri-fmcad-98.ps","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W109791519","https://openalex.org/W1486117303","https://openalex.org/W1501637912","https://openalex.org/W1517173520","https://openalex.org/W1556423252","https://openalex.org/W1741528175","https://openalex.org/W1862475511","https://openalex.org/W1931742729","https://openalex.org/W1995223750","https://openalex.org/W2002328633","https://openalex.org/W2008827904","https://openalex.org/W2082493469","https://openalex.org/W2083831064","https://openalex.org/W2095572512","https://openalex.org/W2102991528","https://openalex.org/W2114266730","https://openalex.org/W2117189826","https://openalex.org/W2127862840","https://openalex.org/W2129183345","https://openalex.org/W2131258926","https://openalex.org/W2137475625","https://openalex.org/W2146707970","https://openalex.org/W2152985659","https://openalex.org/W2159139491","https://openalex.org/W2163962527","https://openalex.org/W2168902074","https://openalex.org/W2169835182","https://openalex.org/W2172280166","https://openalex.org/W2344671925","https://openalex.org/W2476089118","https://openalex.org/W4235714814","https://openalex.org/W4242072765","https://openalex.org/W4255275029"],"related_works":["https://openalex.org/W2106507440","https://openalex.org/W3023586562","https://openalex.org/W2162615969","https://openalex.org/W1928822090","https://openalex.org/W3120172095","https://openalex.org/W3082696694","https://openalex.org/W2130564948","https://openalex.org/W1496505755","https://openalex.org/W2167855737","https://openalex.org/W2800324237"],"abstract_inverted_index":null,"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
