{"id":"https://openalex.org/W1274803","doi":"https://doi.org/10.1007/3-540-48683-6_33","title":"Automatic Verification of Combinational and Pipelined FFT Circuits","display_name":"Automatic Verification of Combinational and Pipelined FFT Circuits","publication_year":1999,"publication_date":"1999-01-01","ids":{"openalex":"https://openalex.org/W1274803","doi":"https://doi.org/10.1007/3-540-48683-6_33","mag":"1274803"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-48683-6_33","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-48683-6_33","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059074630","display_name":"Per Bjesse","orcid":null},"institutions":[{"id":"https://openalex.org/I66862912","display_name":"Chalmers University of Technology","ror":"https://ror.org/040wg7k59","country_code":"SE","type":"education","lineage":["https://openalex.org/I66862912"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Per Bjesse","raw_affiliation_strings":["Chalmers University of Technology, Sweden","Chalmers University of Technology;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chalmers University of Technology, Sweden","institution_ids":["https://openalex.org/I66862912"]},{"raw_affiliation_string":"Chalmers University of Technology;","institution_ids":["https://openalex.org/I66862912"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5059074630"],"corresponding_institution_ids":["https://openalex.org/I66862912"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"380","last_page":"393"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.8340107798576355},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8161924481391907},{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.6528403759002686},{"id":"https://openalex.org/keywords/rewriting","display_name":"Rewriting","score":0.6051183342933655},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.573674201965332},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.5638383626937866},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5117123126983643},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47706615924835205},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.46382299065589905},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.44706255197525024},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3676704168319702},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.35565751791000366},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.3101591467857361},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2180965542793274},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16678300499916077},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12170937657356262}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.8340107798576355},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8161924481391907},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.6528403759002686},{"id":"https://openalex.org/C154690210","wikidata":"https://www.wikidata.org/wiki/Q1668499","display_name":"Rewriting","level":2,"score":0.6051183342933655},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.573674201965332},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.5638383626937866},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5117123126983643},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47706615924835205},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.46382299065589905},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.44706255197525024},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3676704168319702},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.35565751791000366},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.3101591467857361},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2180965542793274},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16678300499916077},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12170937657356262},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/3-540-48683-6_33","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-48683-6_33","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.18.554","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.18.554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.chalmers.se/~indrika/wm99/Papers/bjesse.ps.gz","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.46.8816","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.46.8816","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.chalmers.se/~bjesse/fftpaper.ps.gz","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1686347472","https://openalex.org/W1741528175","https://openalex.org/W1772968073","https://openalex.org/W1786072084","https://openalex.org/W1929502661","https://openalex.org/W2049600101","https://openalex.org/W2156578099","https://openalex.org/W2539907235","https://openalex.org/W4250987182"],"related_works":["https://openalex.org/W2152752131","https://openalex.org/W2363848182","https://openalex.org/W2106507440","https://openalex.org/W2105710452","https://openalex.org/W2122355433","https://openalex.org/W2110968362","https://openalex.org/W4238178324","https://openalex.org/W2163776294","https://openalex.org/W3141297747","https://openalex.org/W4248668797"],"abstract_inverted_index":null,"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}