{"id":"https://openalex.org/W1559934419","doi":"https://doi.org/10.1007/3-540-48051-x_25","title":"A Parallel Transitive Closure Computation Algorithm for VLSI Test Generation","display_name":"A Parallel Transitive Closure Computation Algorithm for VLSI Test Generation","publication_year":2002,"publication_date":"2002-01-01","ids":{"openalex":"https://openalex.org/W1559934419","doi":"https://doi.org/10.1007/3-540-48051-x_25","mag":"1559934419"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-48051-x_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-48051-x_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052317739","display_name":"Seema Bawa","orcid":"https://orcid.org/0000-0002-2780-4960"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Seema Bawa","raw_affiliation_strings":["Computer Science & Engineering, TIET, Patiala, 147 004, India"],"affiliations":[{"raw_affiliation_string":"Computer Science & Engineering, TIET, Patiala, 147 004, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067397644","display_name":"Girish Sharma","orcid":null},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"G. K. Sharma","raw_affiliation_strings":["Information Technology Group, IIITM, Gwalior, 474 005, India"],"affiliations":[{"raw_affiliation_string":"Information Technology Group, IIITM, Gwalior, 474 005, India","institution_ids":["https://openalex.org/I9747756"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5052317739"],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.16558442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"243","last_page":"252"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transitive-closure","display_name":"Transitive closure","score":0.9243641495704651},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8523221015930176},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6771206855773926},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6739974617958069},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6489500999450684},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6171625256538391},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5937963128089905},{"id":"https://openalex.org/keywords/parallel-algorithm","display_name":"Parallel algorithm","score":0.5927650928497314},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5282776951789856},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.45040708780288696},{"id":"https://openalex.org/keywords/time-complexity","display_name":"Time complexity","score":0.41690051555633545},{"id":"https://openalex.org/keywords/closure","display_name":"Closure (psychology)","score":0.410114049911499},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3054457902908325},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10757890343666077},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.07457244396209717}],"concepts":[{"id":"https://openalex.org/C128896722","wikidata":"https://www.wikidata.org/wiki/Q1501387","display_name":"Transitive closure","level":2,"score":0.9243641495704651},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8523221015930176},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6771206855773926},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6739974617958069},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6489500999450684},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6171625256538391},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5937963128089905},{"id":"https://openalex.org/C120373497","wikidata":"https://www.wikidata.org/wiki/Q1087987","display_name":"Parallel algorithm","level":2,"score":0.5927650928497314},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5282776951789856},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.45040708780288696},{"id":"https://openalex.org/C311688","wikidata":"https://www.wikidata.org/wiki/Q2393193","display_name":"Time complexity","level":2,"score":0.41690051555633545},{"id":"https://openalex.org/C146834321","wikidata":"https://www.wikidata.org/wiki/Q2979672","display_name":"Closure (psychology)","level":2,"score":0.410114049911499},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3054457902908325},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10757890343666077},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.07457244396209717},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-48051-x_25","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-48051-x_25","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W13716531","https://openalex.org/W1972848853","https://openalex.org/W1982647060","https://openalex.org/W1988075678","https://openalex.org/W1990771923","https://openalex.org/W2011039300","https://openalex.org/W2021492392","https://openalex.org/W2098033202","https://openalex.org/W2101667554","https://openalex.org/W2101670722","https://openalex.org/W2104734478","https://openalex.org/W2123950145","https://openalex.org/W2134578911","https://openalex.org/W2149107969","https://openalex.org/W2160444875","https://openalex.org/W2161273503","https://openalex.org/W2904250082","https://openalex.org/W3023540311","https://openalex.org/W6638014018"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2607998022","https://openalex.org/W2059382600","https://openalex.org/W28983513","https://openalex.org/W1975558464","https://openalex.org/W2049696289","https://openalex.org/W1838152630"],"abstract_inverted_index":null,"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}