{"id":"https://openalex.org/W1595635846","doi":"https://doi.org/10.1007/3-540-46117-5_101","title":"Integration of Reconfigurable Hardware into System-Level Design","display_name":"Integration of Reconfigurable Hardware into System-Level Design","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W1595635846","doi":"https://doi.org/10.1007/3-540-46117-5_101","mag":"1595635846"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-46117-5_101","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-46117-5_101","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019046014","display_name":"Klaus Buchenrieder","orcid":"https://orcid.org/0009-0003-6227-5122"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Klaus Buchenrieder","raw_affiliation_strings":["Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110199064","display_name":"U. Nageldinger","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulrich Nageldinger","raw_affiliation_strings":["Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068262358","display_name":"A. Pyttel","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Andreas Pyttel","raw_affiliation_strings":["Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058495175","display_name":"A. Sedlmeier","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Alexander Sedlmeier","raw_affiliation_strings":["Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Corporate Logic, D-81730, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I137594350"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"987","last_page":"996"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.7269686460494995},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7152231335639954},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6168556213378906},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5683622360229492},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5434203147888184},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5218088626861572},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.51289963722229},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.5051770806312561},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.49021440744400024},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.48011159896850586},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.42134395241737366},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41978919506073},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17375925183296204}],"concepts":[{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.7269686460494995},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7152231335639954},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6168556213378906},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5683622360229492},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5434203147888184},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5218088626861572},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.51289963722229},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.5051770806312561},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.49021440744400024},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.48011159896850586},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.42134395241737366},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41978919506073},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17375925183296204}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-46117-5_101","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-46117-5_101","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1569009864","https://openalex.org/W1867409042","https://openalex.org/W1991133427","https://openalex.org/W2038904603","https://openalex.org/W2049338756","https://openalex.org/W2122683098","https://openalex.org/W2154749008","https://openalex.org/W2168497347","https://openalex.org/W2539490224"],"related_works":["https://openalex.org/W2058520863","https://openalex.org/W1519183141","https://openalex.org/W3151101169","https://openalex.org/W4252744808","https://openalex.org/W2080050950","https://openalex.org/W2471177015","https://openalex.org/W2142315955","https://openalex.org/W1659609664","https://openalex.org/W1991497933","https://openalex.org/W386281"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
