{"id":"https://openalex.org/W1565999131","doi":"https://doi.org/10.1007/3-540-45716-x_16","title":"Transistor Level Synthesis Dedicated to Fast I.P. Prototyping","display_name":"Transistor Level Synthesis Dedicated to Fast I.P. Prototyping","publication_year":2002,"publication_date":"2002-01-01","ids":{"openalex":"https://openalex.org/W1565999131","doi":"https://doi.org/10.1007/3-540-45716-x_16","mag":"1565999131"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-45716-x_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45716-x_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026401172","display_name":"Alexis Landrault","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]},{"id":"https://openalex.org/I4210105601","display_name":"Infineon Technologies (United Kingdom)","ror":"https://ror.org/017ptvx95","country_code":"GB","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210105601"]}],"countries":["FR","GB"],"is_corresponding":false,"raw_author_name":"A. Landrault","raw_affiliation_strings":["Infineon Technologies, 06560, Sophia Antipolis, France","LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","Infineon Technologies","UMR 9928 CNRS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, 06560, Sophia Antipolis, France","institution_ids":[]},{"raw_affiliation_string":"LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Infineon Technologies","institution_ids":["https://openalex.org/I4210105601"]},{"raw_affiliation_string":"UMR 9928 CNRS","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078321401","display_name":"L. Pellier","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]},{"id":"https://openalex.org/I4210105601","display_name":"Infineon Technologies (United Kingdom)","ror":"https://ror.org/017ptvx95","country_code":"GB","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210105601"]}],"countries":["FR","GB"],"is_corresponding":false,"raw_author_name":"L. Pellier","raw_affiliation_strings":["Infineon Technologies, 06560, Sophia Antipolis, France","LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","Infineon Technologies","UMR 9928 CNRS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, 06560, Sophia Antipolis, France","institution_ids":[]},{"raw_affiliation_string":"LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Infineon Technologies","institution_ids":["https://openalex.org/I4210105601"]},{"raw_affiliation_string":"UMR 9928 CNRS","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112920427","display_name":"A. Richard","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]},{"id":"https://openalex.org/I4210105601","display_name":"Infineon Technologies (United Kingdom)","ror":"https://ror.org/017ptvx95","country_code":"GB","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210105601"]}],"countries":["FR","GB"],"is_corresponding":false,"raw_author_name":"A. Richard","raw_affiliation_strings":["Infineon Technologies, 06560, Sophia Antipolis, France","LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","Infineon Technologies","UMR 9928 CNRS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, 06560, Sophia Antipolis, France","institution_ids":[]},{"raw_affiliation_string":"LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Infineon Technologies","institution_ids":["https://openalex.org/I4210105601"]},{"raw_affiliation_string":"UMR 9928 CNRS","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050583271","display_name":"C. Jay","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"C. Jay","raw_affiliation_strings":["Infineon Technologies, 06560, Sophia Antipolis, France","Infineon Technologies,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, 06560, Sophia Antipolis, France","institution_ids":[]},{"raw_affiliation_string":"Infineon Technologies,","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":null,"display_name":"M. Robert","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"M. Robert","raw_affiliation_strings":["LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","UMR 9928 CNRS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"UMR 9928 CNRS","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5107268061","display_name":"D. Auvergne","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"D. Auvergne","raw_affiliation_strings":["LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","UMR 9928 CNRS"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIRMM, UMR 9928 CNRS, 161, rue Ada, F-34392, Montpellier cedex 5, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"UMR 9928 CNRS","institution_ids":["https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04395567,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"156","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.751481831073761},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7509812116622925},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6479215621948242},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.547782301902771},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5164039731025696},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5147131085395813},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.47654300928115845},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.44986534118652344},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3629901707172394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3419163227081299},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24060222506523132},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.16983625292778015},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09259772300720215},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07954797148704529},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06977075338363647},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.061109066009521484}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.751481831073761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7509812116622925},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6479215621948242},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.547782301902771},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5164039731025696},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5147131085395813},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.47654300928115845},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.44986534118652344},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3629901707172394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3419163227081299},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24060222506523132},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.16983625292778015},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09259772300720215},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07954797148704529},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06977075338363647},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.061109066009521484},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-45716-x_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45716-x_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W87070103","https://openalex.org/W1509201195","https://openalex.org/W1987067207","https://openalex.org/W2053718566","https://openalex.org/W2070089374","https://openalex.org/W2081922338","https://openalex.org/W2095117703","https://openalex.org/W2126693329","https://openalex.org/W2129581038","https://openalex.org/W2134838288","https://openalex.org/W2150731325","https://openalex.org/W2152918839","https://openalex.org/W2161624608","https://openalex.org/W2167378214","https://openalex.org/W2776312368","https://openalex.org/W4236269389"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W98108296","https://openalex.org/W1986774039","https://openalex.org/W2048054109","https://openalex.org/W2170972352","https://openalex.org/W3107352808","https://openalex.org/W2108964809"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}