{"id":"https://openalex.org/W1536800040","doi":"https://doi.org/10.1007/3-540-45716-x_15","title":"Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment","display_name":"Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment","publication_year":2002,"publication_date":"2002-01-01","ids":{"openalex":"https://openalex.org/W1536800040","doi":"https://doi.org/10.1007/3-540-45716-x_15","mag":"1536800040"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-45716-x_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45716-x_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043304774","display_name":"T. Mahnke","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Torsten Mahnke","raw_affiliation_strings":["Institute for Integrated Circuits, Technical University of Munich, Arcisstrasse 21, 80290, Muenchen, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Integrated Circuits, Technical University of Munich, Arcisstrasse 21, 80290, Muenchen, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005732789","display_name":"Walter Stechele","orcid":"https://orcid.org/0000-0002-7455-8483"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Walter Stechele","raw_affiliation_strings":["Institute for Integrated Circuits, Technical University of Munich, Arcisstrasse 21, 80290, Muenchen, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Integrated Circuits, Technical University of Munich, Arcisstrasse 21, 80290, Muenchen, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008028251","display_name":"W. Hoeld","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wolfgang Hoeld","raw_affiliation_strings":["National Semiconductor GmbH, Livry-Gargan-Strasse 10, 82256, Fuerstenfeldbruck, Germany"],"affiliations":[{"raw_affiliation_string":"National Semiconductor GmbH, Livry-Gargan-Strasse 10, 82256, Fuerstenfeldbruck, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5043304774"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":3.4703,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.93549443,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"146","last_page":"155"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7316585183143616},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6481806039810181},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.6040524840354919},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.5956200361251831},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.5860437750816345},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5829921364784241},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.5564191341400146},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.55320143699646},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5125958323478699},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5117385387420654},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4593745470046997},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.45132675766944885},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.43124592304229736},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41674405336380005},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3995576500892639},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28638964891433716},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2638421654701233},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11674019694328308},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10703533887863159}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7316585183143616},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6481806039810181},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.6040524840354919},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.5956200361251831},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.5860437750816345},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5829921364784241},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.5564191341400146},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.55320143699646},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5125958323478699},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5117385387420654},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4593745470046997},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.45132675766944885},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43124592304229736},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41674405336380005},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3995576500892639},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28638964891433716},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2638421654701233},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11674019694328308},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10703533887863159},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-45716-x_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45716-x_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1997742530","https://openalex.org/W2008243923","https://openalex.org/W2083201446","https://openalex.org/W2087966440","https://openalex.org/W2097749440","https://openalex.org/W2121190917","https://openalex.org/W2121487477","https://openalex.org/W2169278276"],"related_works":["https://openalex.org/W1488117239","https://openalex.org/W3129977055","https://openalex.org/W1966764473","https://openalex.org/W2386022279","https://openalex.org/W1792381030","https://openalex.org/W2370649629","https://openalex.org/W659242671","https://openalex.org/W2356140560","https://openalex.org/W2051956260","https://openalex.org/W2356714888"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
