{"id":"https://openalex.org/W1496849734","doi":"https://doi.org/10.1007/3-540-45373-3_16","title":"Second Generation Delay Model for Submicron CMOS Process","display_name":"Second Generation Delay Model for Submicron CMOS Process","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1496849734","doi":"https://doi.org/10.1007/3-540-45373-3_16","mag":"1496849734"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-45373-3_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45373-3_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012426028","display_name":"M. Rezzoug","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4412460525"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"M. Rezzoug","raw_affiliation_strings":["LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France"],"affiliations":[{"raw_affiliation_string":"LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France","institution_ids":["https://openalex.org/I19894307","https://openalex.org/I1294671590","https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015351510","display_name":"Philippe Maurine","orcid":"https://orcid.org/0000-0002-9706-5710"},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4412460525"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Maurine","raw_affiliation_strings":["LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France"],"affiliations":[{"raw_affiliation_string":"LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France","institution_ids":["https://openalex.org/I19894307","https://openalex.org/I1294671590","https://openalex.org/I4210101743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105686845","display_name":"D. Auvergne","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4412460525"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"D. Auvergne","raw_affiliation_strings":["LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France"],"affiliations":[{"raw_affiliation_string":"LIRMM, UMR CNRS, Universit\u00e9 de Montpellier II, (C5506), 161 rue Ada, 34392, Montpellier, France","institution_ids":["https://openalex.org/I19894307","https://openalex.org/I1294671590","https://openalex.org/I4210101743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5012426028"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I19894307","https://openalex.org/I4210101743"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.09581469,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"159","last_page":"167"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6934952139854431},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6926474571228027},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5399107933044434},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5185578465461731},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5171065330505371},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5126222968101501},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.5074142813682556},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5044151544570923},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.49596771597862244},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.47373878955841064},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4290938675403595},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.3961108326911926},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.23344939947128296},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23244979977607727},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2231883406639099},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12095504999160767},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12076246738433838},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09567850828170776}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6934952139854431},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6926474571228027},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5399107933044434},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5185578465461731},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5171065330505371},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5126222968101501},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.5074142813682556},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5044151544570923},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49596771597862244},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.47373878955841064},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4290938675403595},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.3961108326911926},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.23344939947128296},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23244979977607727},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2231883406639099},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12095504999160767},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12076246738433838},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09567850828170776},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-45373-3_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-45373-3_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1986566188","https://openalex.org/W2022892565","https://openalex.org/W2100647666","https://openalex.org/W2108695529","https://openalex.org/W2108923470","https://openalex.org/W2123597521","https://openalex.org/W2125844623","https://openalex.org/W2131466253","https://openalex.org/W2134067926","https://openalex.org/W2134838288","https://openalex.org/W2155255532","https://openalex.org/W2164595330"],"related_works":["https://openalex.org/W3015599398","https://openalex.org/W2034656493","https://openalex.org/W2188730438","https://openalex.org/W2157230896","https://openalex.org/W1824272282","https://openalex.org/W2769457990","https://openalex.org/W1941788997","https://openalex.org/W4281385583","https://openalex.org/W2150435684","https://openalex.org/W3108304312"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
