{"id":"https://openalex.org/W1553333413","doi":"https://doi.org/10.1007/3-540-44869-1_6","title":"A Binary Multiplier Using RTD Based Threshold Logic Gates","display_name":"A Binary Multiplier Using RTD Based Threshold Logic Gates","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W1553333413","doi":"https://doi.org/10.1007/3-540-44869-1_6","mag":"1553333413"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44869-1_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44869-1_6","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103563410","display_name":"Peter M. Kelly","orcid":null},"institutions":[{"id":"https://openalex.org/I138801177","display_name":"University of Ulster","ror":"https://ror.org/01yp9g959","country_code":"GB","type":"education","lineage":["https://openalex.org/I138801177"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"P M Kelly","raw_affiliation_strings":["Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK","institution_ids":["https://openalex.org/I138801177"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114223471","display_name":"C.J. Thompson","orcid":null},"institutions":[{"id":"https://openalex.org/I138801177","display_name":"University of Ulster","ror":"https://ror.org/01yp9g959","country_code":"GB","type":"education","lineage":["https://openalex.org/I138801177"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"C J Thompson","raw_affiliation_strings":["Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK","institution_ids":["https://openalex.org/I138801177"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077410877","display_name":"T.M. McGinnity","orcid":"https://orcid.org/0000-0002-9897-4748"},"institutions":[{"id":"https://openalex.org/I138801177","display_name":"University of Ulster","ror":"https://ror.org/01yp9g959","country_code":"GB","type":"education","lineage":["https://openalex.org/I138801177"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"T M McGinnity","raw_affiliation_strings":["Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK","institution_ids":["https://openalex.org/I138801177"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090581800","display_name":"Liam Maguire","orcid":"https://orcid.org/0000-0001-6153-3298"},"institutions":[{"id":"https://openalex.org/I138801177","display_name":"University of Ulster","ror":"https://ror.org/01yp9g959","country_code":"GB","type":"education","lineage":["https://openalex.org/I138801177"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"L P Maguire","raw_affiliation_strings":["Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"Intelligent Systems Engineering Laboratory, Faculty of Informatics, University of Ulster, Derry, BT48 7JL, Northern Ireland, UK","institution_ids":["https://openalex.org/I138801177"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103563410"],"corresponding_institution_ids":["https://openalex.org/I138801177"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.155177,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"41","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6339880228042603},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6216622591018677},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6211704611778259},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5334306955337524},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4374130070209503},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4295906126499176},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.42072558403015137},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4125830829143524},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4042419195175171},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2683437168598175},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.22586601972579956},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.20452973246574402},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15542179346084595},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.062497615814208984}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6339880228042603},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6216622591018677},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6211704611778259},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5334306955337524},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4374130070209503},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4295906126499176},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.42072558403015137},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4125830829143524},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4042419195175171},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2683437168598175},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.22586601972579956},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.20452973246574402},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15542179346084595},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.062497615814208984},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44869-1_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44869-1_6","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5699999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1537198282","https://openalex.org/W1995341919","https://openalex.org/W2014364178","https://openalex.org/W2077836042","https://openalex.org/W2090559915","https://openalex.org/W2117164389","https://openalex.org/W2128725931","https://openalex.org/W2135436810","https://openalex.org/W2163242933","https://openalex.org/W2188838890"],"related_works":["https://openalex.org/W2017528947","https://openalex.org/W2167525841","https://openalex.org/W2098419840","https://openalex.org/W2526300902","https://openalex.org/W2121963733","https://openalex.org/W2170504327","https://openalex.org/W2542337934","https://openalex.org/W1977171228","https://openalex.org/W1985308002","https://openalex.org/W1990901299"],"abstract_inverted_index":null,"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
