{"id":"https://openalex.org/W2280193130","doi":"https://doi.org/10.1007/3-540-44687-7_47","title":"The Evolution of Programmable Logic: Past, Present, and Future Predictions","display_name":"The Evolution of Programmable Logic: Past, Present, and Future Predictions","publication_year":2001,"publication_date":"2001-01-01","ids":{"openalex":"https://openalex.org/W2280193130","doi":"https://doi.org/10.1007/3-540-44687-7_47","mag":"2280193130"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44687-7_47","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44687-7_47","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079987664","display_name":"Bill Carter","orcid":"https://orcid.org/0000-0003-3545-825X"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Bill Carter","raw_affiliation_strings":["Xilinx Inc., 2100 Logic Drive, San Jose, CA, 95124, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xilinx Inc., 2100 Logic Drive, San Jose, CA, 95124, USA","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5079987664"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19440655,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"461","last_page":"461"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9714000225067139,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9714000225067139,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12002","display_name":"Computability, Logic, AI Algorithms","score":0.9664999842643738,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9508000016212463,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.8007729053497314},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7267107367515564},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.7103047966957092},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.6993089914321899},{"id":"https://openalex.org/keywords/programmable-array-logic","display_name":"Programmable Array Logic","score":0.6340858340263367},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.5619701743125916},{"id":"https://openalex.org/keywords/erasable-programmable-logic-device","display_name":"Erasable programmable logic device","score":0.5611739158630371},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5464913845062256},{"id":"https://openalex.org/keywords/complex-programmable-logic-device","display_name":"Complex programmable logic device","score":0.5389246940612793},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.5386756062507629},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5213443040847778},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4785888195037842},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.4653642177581787},{"id":"https://openalex.org/keywords/macrocell-array","display_name":"Macrocell array","score":0.46476492285728455},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4620814323425293},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.450969934463501},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.4440213441848755},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.357832670211792},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.257976770401001},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.22482502460479736},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2095358669757843},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13301348686218262},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10277888178825378}],"concepts":[{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.8007729053497314},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7267107367515564},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.7103047966957092},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.6993089914321899},{"id":"https://openalex.org/C113323844","wikidata":"https://www.wikidata.org/wiki/Q1378651","display_name":"Programmable Array Logic","level":5,"score":0.6340858340263367},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.5619701743125916},{"id":"https://openalex.org/C110050671","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Erasable programmable logic device","level":5,"score":0.5611739158630371},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5464913845062256},{"id":"https://openalex.org/C128315158","wikidata":"https://www.wikidata.org/wiki/Q1063858","display_name":"Complex programmable logic device","level":2,"score":0.5389246940612793},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.5386756062507629},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5213443040847778},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4785888195037842},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.4653642177581787},{"id":"https://openalex.org/C142278197","wikidata":"https://www.wikidata.org/wiki/Q4284934","display_name":"Macrocell array","level":5,"score":0.46476492285728455},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4620814323425293},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.450969934463501},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4440213441848755},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.357832670211792},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.257976770401001},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.22482502460479736},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2095358669757843},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13301348686218262},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10277888178825378},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44687-7_47","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44687-7_47","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1528933814","https://openalex.org/W3013792460","https://openalex.org/W3117015220","https://openalex.org/W2376859467","https://openalex.org/W4389045693","https://openalex.org/W3022525969","https://openalex.org/W1904803855","https://openalex.org/W2054740893","https://openalex.org/W2466591189","https://openalex.org/W133576369"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}