{"id":"https://openalex.org/W1585605180","doi":"https://doi.org/10.1007/3-540-44614-1_76","title":"Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs","display_name":"Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1585605180","doi":"https://doi.org/10.1007/3-540-44614-1_76","mag":"1585605180"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44614-1_76","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_76","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053527505","display_name":"Valery Sklyarov","orcid":"https://orcid.org/0000-0003-0349-8329"},"institutions":[{"id":"https://openalex.org/I60858718","display_name":"University of Aveiro","ror":"https://ror.org/00nt41z93","country_code":"PT","type":"education","lineage":["https://openalex.org/I60858718"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Valery Sklyarov","raw_affiliation_strings":["Department of Electronics and Telecommunications, University of Aveiro, Portugal"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, University of Aveiro, Portugal","institution_ids":["https://openalex.org/I60858718"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5053527505"],"corresponding_institution_ids":["https://openalex.org/I60858718"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":18.9264,"has_fulltext":false,"cited_by_count":68,"citation_normalized_percentile":{"value":0.9913135,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"718","last_page":"727"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9909999966621399,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.8408641815185547},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8321722149848938},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8251287937164307},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.5976622104644775},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.5249122381210327},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.49706342816352844},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48939862847328186},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4779938757419586},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4765894114971161},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.45855849981307983},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4417967200279236},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.25278717279434204},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24794116616249084},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08458900451660156}],"concepts":[{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.8408641815185547},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8321722149848938},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8251287937164307},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.5976622104644775},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.5249122381210327},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.49706342816352844},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48939862847328186},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4779938757419586},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4765894114971161},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.45855849981307983},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4417967200279236},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.25278717279434204},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24794116616249084},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08458900451660156}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44614-1_76","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_76","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1489025655","https://openalex.org/W2129183345","https://openalex.org/W2158068912","https://openalex.org/W4213095369"],"related_works":["https://openalex.org/W2535130387","https://openalex.org/W2110968362","https://openalex.org/W4238178324","https://openalex.org/W2163776294","https://openalex.org/W3141297747","https://openalex.org/W2106889348","https://openalex.org/W4248668797","https://openalex.org/W2111485030","https://openalex.org/W2141941412","https://openalex.org/W1603944672"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":10},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}