{"id":"https://openalex.org/W1549096983","doi":"https://doi.org/10.1007/3-540-44614-1_49","title":"Reusable DSP Functions in FPGAs","display_name":"Reusable DSP Functions in FPGAs","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1549096983","doi":"https://doi.org/10.1007/3-540-44614-1_49","mag":"1549096983"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44614-1_49","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_49","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036607548","display_name":"Jernej Andrejas","orcid":null},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":true,"raw_author_name":"Jernej Andrejas","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, 1000, Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, 1000, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I153976015"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084820164","display_name":"Andrej Tro\u0161t","orcid":"https://orcid.org/0000-0001-9641-5806"},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"Andrej Trost","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, 1000, Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Trzaska 25, 1000, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I153976015"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5036607548"],"corresponding_institution_ids":["https://openalex.org/I153976015"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.15178571,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"456","last_page":"461"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9853000044822693,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.9059340953826904},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.8461480140686035},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8059691190719604},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7717652320861816},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5780455470085144},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.5084632635116577},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4427635669708252},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42206841707229614},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33154886960983276},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1373196840286255}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9059340953826904},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.8461480140686035},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8059691190719604},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7717652320861816},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5780455470085144},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.5084632635116577},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4427635669708252},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42206841707229614},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33154886960983276},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1373196840286255},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44614-1_49","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_49","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.44999998807907104,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W198483250","https://openalex.org/W1987553023"],"related_works":["https://openalex.org/W3004362061","https://openalex.org/W2364622490","https://openalex.org/W2042515040","https://openalex.org/W2383986884","https://openalex.org/W2356141508","https://openalex.org/W4297665406","https://openalex.org/W1735031787","https://openalex.org/W2749962643","https://openalex.org/W2390807153","https://openalex.org/W1876592433"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
