{"id":"https://openalex.org/W2145252633","doi":"https://doi.org/10.1007/3-540-44614-1_19","title":"Self-Testing of Linear Segments in User-Programmed FPGAs","display_name":"Self-Testing of Linear Segments in User-Programmed FPGAs","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W2145252633","doi":"https://doi.org/10.1007/3-540-44614-1_19","mag":"2145252633"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44614-1_19","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_19","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016065879","display_name":"Pawe\u0142 Tomaszewicz","orcid":"https://orcid.org/0000-0002-7784-6595"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Pawel Tomaszewicz","raw_affiliation_strings":["Warsaw University of Technology, Nowowiejska 15/19, 00-665, Warsaw, Poland"],"affiliations":[{"raw_affiliation_string":"Warsaw University of Technology, Nowowiejska 15/19, 00-665, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5016065879"],"corresponding_institution_ids":["https://openalex.org/I108403487"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":1.0846,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.7734375,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"169","last_page":"174"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7987641096115112},{"id":"https://openalex.org/keywords/digital-pattern-generator","display_name":"Digital pattern generator","score":0.7753357887268066},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7408331632614136},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5875285267829895},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4991295337677002},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4707180857658386},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.44380617141723633},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.4347347617149353},{"id":"https://openalex.org/keywords/test-plan","display_name":"Test plan","score":0.43138042092323303},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4079738259315491},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4007074534893036},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3301589787006378},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32402193546295166},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10491463541984558},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.07891577482223511}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7987641096115112},{"id":"https://openalex.org/C151346624","wikidata":"https://www.wikidata.org/wiki/Q5276129","display_name":"Digital pattern generator","level":3,"score":0.7753357887268066},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7408331632614136},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5875285267829895},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4991295337677002},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4707180857658386},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.44380617141723633},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.4347347617149353},{"id":"https://openalex.org/C12148698","wikidata":"https://www.wikidata.org/wiki/Q364651","display_name":"Test plan","level":3,"score":0.43138042092323303},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4079738259315491},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4007074534893036},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3301589787006378},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32402193546295166},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10491463541984558},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.07891577482223511},{"id":"https://openalex.org/C173291955","wikidata":"https://www.wikidata.org/wiki/Q732332","display_name":"Weibull distribution","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44614-1_19","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_19","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1921192440","https://openalex.org/W2045577580","https://openalex.org/W2051411123","https://openalex.org/W2157009629","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2135636985","https://openalex.org/W2394143195","https://openalex.org/W3023652529","https://openalex.org/W2075985769","https://openalex.org/W2463482348","https://openalex.org/W2071567894","https://openalex.org/W2182398074","https://openalex.org/W2116889720","https://openalex.org/W4321511862","https://openalex.org/W2954224802"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}