{"id":"https://openalex.org/W1494432786","doi":"https://doi.org/10.1007/3-540-44614-1_15","title":"Verification of Dynamically Reconfigurable Logic","display_name":"Verification of Dynamically Reconfigurable Logic","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1494432786","doi":"https://doi.org/10.1007/3-540-44614-1_15","mag":"1494432786"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44614-1_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000551567","display_name":"David Robinson","orcid":"https://orcid.org/0000-0002-7365-510X"},"institutions":[{"id":"https://openalex.org/I181647926","display_name":"University of Strathclyde","ror":"https://ror.org/00n3w3b69","country_code":"GB","type":"education","lineage":["https://openalex.org/I181647926"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"David Robinson","raw_affiliation_strings":["Dept. Electronic and Electrical Engineering, University of Strathclyde, Glasgow, UK","University of Strathclyde"],"affiliations":[{"raw_affiliation_string":"Dept. Electronic and Electrical Engineering, University of Strathclyde, Glasgow, UK","institution_ids":["https://openalex.org/I181647926"]},{"raw_affiliation_string":"University of Strathclyde","institution_ids":["https://openalex.org/I181647926"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070921981","display_name":"Patrick Lysaght","orcid":null},"institutions":[{"id":"https://openalex.org/I181647926","display_name":"University of Strathclyde","ror":"https://ror.org/00n3w3b69","country_code":"GB","type":"education","lineage":["https://openalex.org/I181647926"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Patrick Lysaght","raw_affiliation_strings":["Dept. Electronic and Electrical Engineering, University of Strathclyde, Glasgow, UK","University of Strathclyde"],"affiliations":[{"raw_affiliation_string":"Dept. Electronic and Electrical Engineering, University of Strathclyde, Glasgow, UK","institution_ids":["https://openalex.org/I181647926"]},{"raw_affiliation_string":"University of Strathclyde","institution_ids":["https://openalex.org/I181647926"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5000551567"],"corresponding_institution_ids":["https://openalex.org/I181647926"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.6935,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.87179487,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"150"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9538000226020813,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9297999739646912,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8496949672698975},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6130313873291016},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.537675142288208},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5228429436683655},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.5176887512207031},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.4838918149471283},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4315345883369446},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.39065176248550415},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3828023076057434},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3369763493537903},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.198871910572052},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18640106916427612}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8496949672698975},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6130313873291016},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.537675142288208},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5228429436683655},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.5176887512207031},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4838918149471283},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4315345883369446},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.39065176248550415},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3828023076057434},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3369763493537903},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.198871910572052},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18640106916427612},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1007/3-540-44614-1_15","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44614-1_15","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.19.5413","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.19.5413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://oak.eee.strath.ac.uk/papers/Robinson_and_Lysaght1.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.19.6343","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.19.6343","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://oak.eee.strath.ac.uk/papers/Robinson_and_Lysaght.ps","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W563281863","https://openalex.org/W1525794408","https://openalex.org/W1680428368","https://openalex.org/W1817086147","https://openalex.org/W1839110278","https://openalex.org/W2097235647","https://openalex.org/W2097451609","https://openalex.org/W2967359110"],"related_works":["https://openalex.org/W2147419146","https://openalex.org/W2135636985","https://openalex.org/W2197466303","https://openalex.org/W1607849496","https://openalex.org/W2462231960","https://openalex.org/W2139569078","https://openalex.org/W2136570321","https://openalex.org/W2368888192","https://openalex.org/W2170504327","https://openalex.org/W2526300902"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
