{"id":"https://openalex.org/W1525481921","doi":"https://doi.org/10.1007/3-540-44570-6_4","title":"Memory System Support for Dynamic Cache Line Assembly","display_name":"Memory System Support for Dynamic Cache Line Assembly","publication_year":2001,"publication_date":"2001-01-01","ids":{"openalex":"https://openalex.org/W1525481921","doi":"https://doi.org/10.1007/3-540-44570-6_4","mag":"1525481921"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44570-6_4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44570-6_4","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008977627","display_name":"Lixin Zhang","orcid":"https://orcid.org/0000-0001-6799-3586"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Lixin Zhang","raw_affiliation_strings":["School of Computing, University of Utah, Salt Lake City, UT, 84112"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, Salt Lake City, UT, 84112","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017757562","display_name":"Venkata K. Pingali","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Venkata K. Pingali","raw_affiliation_strings":["School of Computing, University of Utah, Salt Lake City, UT, 84112"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, Salt Lake City, UT, 84112","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080409517","display_name":"Bharat Chandramouli","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bharat Chandramouli","raw_affiliation_strings":["School of Computing, University of Utah, Salt Lake City, UT, 84112"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, Salt Lake City, UT, 84112","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007283828","display_name":"John B. Carter","orcid":"https://orcid.org/0000-0002-1395-0254"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John B. Carter","raw_affiliation_strings":["School of Computing, University of Utah, Salt Lake City, UT, 84112"],"affiliations":[{"raw_affiliation_string":"School of Computing, University of Utah, Salt Lake City, UT, 84112","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5008977627"],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.9578,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.72356688,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"56","last_page":"70"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.897535502910614},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7523699998855591},{"id":"https://openalex.org/keywords/locality-of-reference","display_name":"Locality of reference","score":0.6652517318725586},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6595653295516968},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.6303449869155884},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5579128265380859},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.5049713253974915},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.5043627023696899},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.4744606614112854},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4510377049446106},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2293468713760376},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2241927683353424}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.897535502910614},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7523699998855591},{"id":"https://openalex.org/C27602214","wikidata":"https://www.wikidata.org/wiki/Q1868547","display_name":"Locality of reference","level":3,"score":0.6652517318725586},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6595653295516968},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.6303449869155884},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5579128265380859},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.5049713253974915},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.5043627023696899},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.4744606614112854},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4510377049446106},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2293468713760376},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2241927683353424},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44570-6_4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44570-6_4","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7300000190734863,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W44696310","https://openalex.org/W342480243","https://openalex.org/W1973122629","https://openalex.org/W2028914463","https://openalex.org/W2041174925","https://openalex.org/W2050336192","https://openalex.org/W2096070062","https://openalex.org/W2097215759","https://openalex.org/W2097773861","https://openalex.org/W2131771728","https://openalex.org/W2156275124","https://openalex.org/W2244841219","https://openalex.org/W4253494365","https://openalex.org/W6660444734"],"related_works":["https://openalex.org/W2734782074","https://openalex.org/W2114386333","https://openalex.org/W4307138321","https://openalex.org/W2098406302","https://openalex.org/W1970102182","https://openalex.org/W2089633376","https://openalex.org/W2524492834","https://openalex.org/W4244939384","https://openalex.org/W2121386169","https://openalex.org/W3010432610"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}