{"id":"https://openalex.org/W1808967976","doi":"https://doi.org/10.1007/3-540-44570-6_1","title":"A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro","display_name":"A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro","publication_year":2001,"publication_date":"2001-01-01","ids":{"openalex":"https://openalex.org/W1808967976","doi":"https://doi.org/10.1007/3-540-44570-6_1","mag":"1808967976"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44570-6_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44570-6_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110804455","display_name":"Junji Ogawa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094759","display_name":"Fujitsu (United States)","ror":"https://ror.org/0073whr05","country_code":"US","type":"company","lineage":["https://openalex.org/I2252096349","https://openalex.org/I4210094759"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Junji Ogawa","raw_affiliation_strings":["Fujitsu Laboratories of America, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fujitsu Laboratories of America, USA","institution_ids":["https://openalex.org/I4210094759"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090469068","display_name":"Mark Horowitz","orcid":"https://orcid.org/0000-0003-3245-7542"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Horowitz","raw_affiliation_strings":["Computer Systems Laboratory, Stanford University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Laboratory, Stanford University, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19480131,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"14"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8007204532623291},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7888423800468445},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.7023494243621826},{"id":"https://openalex.org/keywords/synchronizing","display_name":"Synchronizing","score":0.6409696936607361},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.6032029986381531},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.5220938920974731},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4528079032897949},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.444691002368927},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4393369257450104},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.41429680585861206},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4007919728755951},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32417523860931396},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15010800957679749},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0861610472202301}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8007204532623291},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7888423800468445},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.7023494243621826},{"id":"https://openalex.org/C162932704","wikidata":"https://www.wikidata.org/wiki/Q1058791","display_name":"Synchronizing","level":3,"score":0.6409696936607361},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.6032029986381531},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.5220938920974731},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4528079032897949},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.444691002368927},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4393369257450104},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.41429680585861206},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4007919728755951},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32417523860931396},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15010800957679749},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0861610472202301},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44570-6_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44570-6_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7799999713897705,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1483152377","https://openalex.org/W1488646947","https://openalex.org/W1540125283","https://openalex.org/W1558377743","https://openalex.org/W1579809276","https://openalex.org/W2000490573","https://openalex.org/W2112980698","https://openalex.org/W2115172404","https://openalex.org/W2124865142","https://openalex.org/W2129448581","https://openalex.org/W2137023023","https://openalex.org/W2146634722","https://openalex.org/W2152484003","https://openalex.org/W2170879098","https://openalex.org/W2171825402","https://openalex.org/W2188774670","https://openalex.org/W4229591902","https://openalex.org/W4236485791","https://openalex.org/W4247540940"],"related_works":["https://openalex.org/W1976244802","https://openalex.org/W4293430534","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W2122646225","https://openalex.org/W3140615508","https://openalex.org/W2029945810","https://openalex.org/W1954780666","https://openalex.org/W2216509856"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
