{"id":"https://openalex.org/W1515585879","doi":"https://doi.org/10.1007/3-540-39999-2_3","title":"The New DRAM Interfaces: SDRAM, RDRAM and Variants","display_name":"The New DRAM Interfaces: SDRAM, RDRAM and Variants","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1515585879","doi":"https://doi.org/10.1007/3-540-39999-2_3","mag":"1515585879"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-39999-2_3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-39999-2_3","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022317234","display_name":"Brian Davis","orcid":"https://orcid.org/0000-0002-4937-6231"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Brian Davis","raw_affiliation_strings":["Electrical Engineering & Computer Science, University of Michigan, Ann Arbor","(University of Michigan)"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering & Computer Science, University of Michigan, Ann Arbor","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"(University of Michigan)","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047597896","display_name":"Bruce Jacob","orcid":"https://orcid.org/0009-0005-3493-8245"},"institutions":[{"id":"https://openalex.org/I66946132","display_name":"University of Maryland, College Park","ror":"https://ror.org/047s2c258","country_code":"US","type":"education","lineage":["https://openalex.org/I66946132"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bruce Jacob","raw_affiliation_strings":["Electrical & Computer Engineering, University of Maryland at College Park","University of Maryland, at College Park"],"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, University of Maryland at College Park","institution_ids":["https://openalex.org/I66946132"]},{"raw_affiliation_string":"University of Maryland, at College Park","institution_ids":["https://openalex.org/I66946132"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037541525","display_name":"Trevor Mudge","orcid":"https://orcid.org/0000-0001-7845-2187"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Trevor Mudge","raw_affiliation_strings":["Electrical Engineering & Computer Science, University of Michigan, Ann Arbor","(University of Michigan)"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering & Computer Science, University of Michigan, Ann Arbor","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"(University of Michigan)","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5022317234"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":10.4208,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.97544879,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"26","last_page":"31"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9481574296951294},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7735904455184937},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.6133502721786499},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.5816091895103455},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5136808753013611},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4525146782398224},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.43073606491088867},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.41721421480178833},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40052953362464905},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3517484962940216},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.2872847020626068},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.28400492668151855},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.24453705549240112},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24199515581130981}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9481574296951294},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7735904455184937},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.6133502721786499},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.5816091895103455},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5136808753013611},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4525146782398224},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.43073606491088867},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.41721421480178833},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40052953362464905},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3517484962940216},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.2872847020626068},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.28400492668151855},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.24453705549240112},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24199515581130981}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/3-540-39999-2_3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-39999-2_3","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.38.6868","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.38.6868","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eng.umd.edu/~blj/papers/ishpc2000.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1784627604","https://openalex.org/W1983096721","https://openalex.org/W2123306627","https://openalex.org/W3000143637","https://openalex.org/W6638197151"],"related_works":["https://openalex.org/W4386903460","https://openalex.org/W2536264121","https://openalex.org/W2516517078","https://openalex.org/W2900372418","https://openalex.org/W2338545698","https://openalex.org/W4382618825","https://openalex.org/W2924367614","https://openalex.org/W2181692804","https://openalex.org/W4221167253","https://openalex.org/W2912837441"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}